单参考连续速率时钟和数据恢复从30mbit /s到3.2 Gbit/s

J. Frambach, R. Heijna, R. Krosschell
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引用次数: 7

摘要

今天的网络包含了无数的比特率,既有新出现的比特率,也有遗留的比特率。为了覆盖所有这些比特率,开发了一种连续速率芯片组,包含连续速率时钟和数据恢复,能够恢复30 Mbit/s和3.2 Gbit/s之间的任何比特率。当只使用一个参考频率时,基于分数n分频器和频率窗检测器的频率采集环路可提供4.8 Hz的频率分辨率。内置的PRBS发生器提供高频测试。
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Single reference continuous rate clock and data recovery from 30 Mbit/s to 3.2 Gbit/s
Today's networks encompass a myriad of bit rates, both new appearing rates as well as legacy ones. To cover all these bit rates, a continuous rate chip-set was developed, containing a continuous rate clock and data recovery, capable of recovering any bit rate between 30 Mbit/s and 3.2 Gbit/s. While using only one single reference frequency, a frequency acquisition loop, based on a fractional-N divider and a frequency window detector, provides 4.8 Hz frequency resolution. A built-in PRBS generator provides for high frequency testing.
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