串联栅电阻在CDM ESD保护设计中的有效性研究

2013 IEEE 10th International Conference on ASIC Pub Date : 2013-10-01 DOI:10.1109/ASICON.2013.6811976

Y. Zhou, A. Righter, J. Hajjar

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引用次数: 5

摘要

采用SPICE仿真系统评估了栅极串联电阻对CDM保护效果的影响，并采用改进的VF-TLP测试方法进行了验证。结果表明，电阻对MOS输入器件的有效性高度依赖于受保护MOS器件的尺寸以及ESD保护电路的类型。较大的MOS器件比较小的器件需要更小的电阻值。

本文章由计算机程序翻译，如有差异，请以英文原文为准。

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Investigation on effectiveness of series gate resistor in CDM ESD protection designs

The impact of gate series resistor on CDM protection effectiveness is systematically evaluated using SPICE simulation and verified with a modified VF-TLP test method. It is shown that the effectiveness of the resistor to a MOS input device is highly dependent on the size of the protected MOS device as well as on the types of ESD protection circuits. Larger MOS devices require smaller resistance values than smaller devices.

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2013 IEEE 10th International Conference on ASIC

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