K. Boyle, P. Mercier, N. Sadeghi, V. Gaudet, C. Schlegel, C. Winstead, M. Kashyap
{"title":"全模拟快速傅立叶变换处理器的设计与实现","authors":"K. Boyle, P. Mercier, N. Sadeghi, V. Gaudet, C. Schlegel, C. Winstead, M. Kashyap","doi":"10.1109/MWSCAS.2007.4488832","DOIUrl":null,"url":null,"abstract":"The implementation of a 64-symbol analog, current-mode FFT processor is discussed. An analog FFT would be suitable for combination with an analog decoder in the making of an all-analog communication front-end for OFDM systems. Here the FFT is implemented using a butterfly diagram as the system block diagram; each node in the diagram is implemented using analog circuits. Implementation details, including consideration of the effect of approximation errors and the implementation of a test chip, are discussed.","PeriodicalId":256061,"journal":{"name":"2007 50th Midwest Symposium on Circuits and Systems","volume":"91 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2007-08-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"14","resultStr":"{\"title\":\"Design and implementation of an all-analog fast-fourier transform processor\",\"authors\":\"K. Boyle, P. Mercier, N. Sadeghi, V. Gaudet, C. Schlegel, C. Winstead, M. Kashyap\",\"doi\":\"10.1109/MWSCAS.2007.4488832\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"The implementation of a 64-symbol analog, current-mode FFT processor is discussed. An analog FFT would be suitable for combination with an analog decoder in the making of an all-analog communication front-end for OFDM systems. Here the FFT is implemented using a butterfly diagram as the system block diagram; each node in the diagram is implemented using analog circuits. Implementation details, including consideration of the effect of approximation errors and the implementation of a test chip, are discussed.\",\"PeriodicalId\":256061,\"journal\":{\"name\":\"2007 50th Midwest Symposium on Circuits and Systems\",\"volume\":\"91 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2007-08-01\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"14\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2007 50th Midwest Symposium on Circuits and Systems\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/MWSCAS.2007.4488832\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2007 50th Midwest Symposium on Circuits and Systems","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/MWSCAS.2007.4488832","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
Design and implementation of an all-analog fast-fourier transform processor
The implementation of a 64-symbol analog, current-mode FFT processor is discussed. An analog FFT would be suitable for combination with an analog decoder in the making of an all-analog communication front-end for OFDM systems. Here the FFT is implemented using a butterfly diagram as the system block diagram; each node in the diagram is implemented using analog circuits. Implementation details, including consideration of the effect of approximation errors and the implementation of a test chip, are discussed.