{"title":"电源电压和温度对CNFET和纳米级Si-MOSFET sram稳定性和性能影响的比较研究","authors":"M. Moradinasab, F. Karbassian, M. Fathipour","doi":"10.1109/ASQED.2009.5206304","DOIUrl":null,"url":null,"abstract":"In this paper we investigate the effects of supply voltage and the temperature on the characteristics of the Static Random Access Memory (SRAM). Two nanoscale SRAM cells based on Carbon Nanotube Field Effect Transistors (CNFETs) and Silicon MOSFET Transistors (Si-MOSFETs) were investigated for application in 32nm technology node. Simulation studies show that the stability of CNFET SRAM against supply voltage variation and temperature influences is larger than those of its Si-MOSFET SRAM counterpart. Furthermore, the circuit performance affected by these two parameters in a 32k SRAM array was investigated. The results show that the read access time in CNFET SRAM arrays based on chirality vectors bigger than (23,0), is less than conventional MOSFET SRAM array.","PeriodicalId":437303,"journal":{"name":"2009 1st Asia Symposium on Quality Electronic Design","volume":"324 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2009-07-15","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"16","resultStr":"{\"title\":\"A comparison study of the effects of supply voltage and temperature on the stability and performance of CNFET and nanoscale Si-MOSFET SRAMs\",\"authors\":\"M. Moradinasab, F. Karbassian, M. Fathipour\",\"doi\":\"10.1109/ASQED.2009.5206304\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"In this paper we investigate the effects of supply voltage and the temperature on the characteristics of the Static Random Access Memory (SRAM). Two nanoscale SRAM cells based on Carbon Nanotube Field Effect Transistors (CNFETs) and Silicon MOSFET Transistors (Si-MOSFETs) were investigated for application in 32nm technology node. Simulation studies show that the stability of CNFET SRAM against supply voltage variation and temperature influences is larger than those of its Si-MOSFET SRAM counterpart. Furthermore, the circuit performance affected by these two parameters in a 32k SRAM array was investigated. The results show that the read access time in CNFET SRAM arrays based on chirality vectors bigger than (23,0), is less than conventional MOSFET SRAM array.\",\"PeriodicalId\":437303,\"journal\":{\"name\":\"2009 1st Asia Symposium on Quality Electronic Design\",\"volume\":\"324 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2009-07-15\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"16\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2009 1st Asia Symposium on Quality Electronic Design\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/ASQED.2009.5206304\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2009 1st Asia Symposium on Quality Electronic Design","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ASQED.2009.5206304","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
A comparison study of the effects of supply voltage and temperature on the stability and performance of CNFET and nanoscale Si-MOSFET SRAMs
In this paper we investigate the effects of supply voltage and the temperature on the characteristics of the Static Random Access Memory (SRAM). Two nanoscale SRAM cells based on Carbon Nanotube Field Effect Transistors (CNFETs) and Silicon MOSFET Transistors (Si-MOSFETs) were investigated for application in 32nm technology node. Simulation studies show that the stability of CNFET SRAM against supply voltage variation and temperature influences is larger than those of its Si-MOSFET SRAM counterpart. Furthermore, the circuit performance affected by these two parameters in a 32k SRAM array was investigated. The results show that the read access time in CNFET SRAM arrays based on chirality vectors bigger than (23,0), is less than conventional MOSFET SRAM array.