Design of a novel all-CMOS low power voltage reference circuit

A new low-power voltage reference circuit was proposed using the SMIC 0.18um standard CMOS process technology. The resulting voltage is equal to the extrapolated threshold voltage of a MOSFET at 0K, which was about 620mV for this process. Cadence Spectre simulation results show that the temperature coefficient of the output voltage was 12.9ppm/° in a range from -20 to 80°. The line sensitivity was 328ppm/V in a supply voltage range of 1.2-3V. Meanwhile - 68 dB @ 100Hz of the power supply rejection ratio (PSRR) is reached and it merely consumes 0.21 μ W of power. The proposed circuit is full composed of CMOS devices without any use of resistors, which enjoys the merits of low power consumption and small chip area.