Enhancing an Asynchronous Circuit Design Flow to Support Complex Digital System Design

Robustness to variations is desirable in current digital circuit design techniques. Sources of variations are many, and the evolution of current integrated circuit fabrication technologies does increase the amount of such sources and the complexity of ensuring circuit robustness against them. Some design paradigms naturally counter variations to one or more variation sources. Asynchronous quasi-delay insensitive design is such a paradigm, providing robustness to process, supply voltage, temperature, ageing and IR drop variations. This paper proposes an enhancement to Pulsar, a recently proposed open source automated flow for the design of quasi-delay insensitive circuits. A new set of abstract components enables the description of choices and decisions about the flow of data tokens inside asynchronous circuits. These components are now available to be used in the design capture phase of Pulsar. To build circuit cells that implement the abstract (synthesis-enabled) components, this paper brings the proposal of the handshaking mutex (HM), a versatile complex gate that eases the design of asynchronous arbiters. Results demonstrate the new flow is more powerful than the baseline version, enabling the automated synthesis of complex asynchronous circuits.