{"title":"采用前导零检测器的CORDIC处理器的讨论","authors":"Tso-Bing Juang, Shen-Fu Hsiao","doi":"10.1109/SSMSD.2000.836468","DOIUrl":null,"url":null,"abstract":"In this paper the application of CORDIC (COordinate Rotation DIgital Computer) processor using leading zeros detector (LZD) is discussed. In previous research, LZD was used in the normalization of the floating point number computation, also we find that it can be used in the CORDIC processor for reducing the number of iterations, deciding the sign of redundant number and speeding the computation of the exponent.","PeriodicalId":166604,"journal":{"name":"2000 Southwest Symposium on Mixed-Signal Design (Cat. No.00EX390)","volume":"39 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"1900-01-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"2","resultStr":"{\"title\":\"Discussions on the CORDIC processor using leading zeros detector\",\"authors\":\"Tso-Bing Juang, Shen-Fu Hsiao\",\"doi\":\"10.1109/SSMSD.2000.836468\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"In this paper the application of CORDIC (COordinate Rotation DIgital Computer) processor using leading zeros detector (LZD) is discussed. In previous research, LZD was used in the normalization of the floating point number computation, also we find that it can be used in the CORDIC processor for reducing the number of iterations, deciding the sign of redundant number and speeding the computation of the exponent.\",\"PeriodicalId\":166604,\"journal\":{\"name\":\"2000 Southwest Symposium on Mixed-Signal Design (Cat. No.00EX390)\",\"volume\":\"39 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"1900-01-01\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"2\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2000 Southwest Symposium on Mixed-Signal Design (Cat. No.00EX390)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/SSMSD.2000.836468\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2000 Southwest Symposium on Mixed-Signal Design (Cat. No.00EX390)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/SSMSD.2000.836468","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
Discussions on the CORDIC processor using leading zeros detector
In this paper the application of CORDIC (COordinate Rotation DIgital Computer) processor using leading zeros detector (LZD) is discussed. In previous research, LZD was used in the normalization of the floating point number computation, also we find that it can be used in the CORDIC processor for reducing the number of iterations, deciding the sign of redundant number and speeding the computation of the exponent.
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