I.M.O.G.E.N.E.机器:一些硬件元素

Vincent Lefévère, S. Karpf, C. Chaillou, M. Mériaux
{"title":"I.M.O.G.E.N.E.机器:一些硬件元素","authors":"Vincent Lefévère, S. Karpf, C. Chaillou, M. Mériaux","doi":"10.2312/EGGH/EGGH91/054-073","DOIUrl":null,"url":null,"abstract":"The goal of the I.M.O.G.E.N.E. project is to define a real time graphics system. We focus on true real time display, images being computed at frame rate, i.e 50 (or 60) times a second. The I.M.O.G.E.N.E. machine uses no frame buffer. We use a massive object parallelism; the graphics module is made of a large number of object-processors, each one handling one graphics primitive at pixel rate in rasterscan order. Shading computations are made in a deferred shading processor using Phong's method. After a brief presentation of Object-Oriented Architectures, we present new details about the hardware implementation of our Object Processors, and describe for the first time the shading processor.","PeriodicalId":206166,"journal":{"name":"Advances in Computer Graphics Hardware","volume":"16 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"1991-09-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":"{\"title\":\"The I.M.O.G.E.N.E. Machine: Some Hardware Elements\",\"authors\":\"Vincent Lefévère, S. Karpf, C. Chaillou, M. Mériaux\",\"doi\":\"10.2312/EGGH/EGGH91/054-073\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"The goal of the I.M.O.G.E.N.E. project is to define a real time graphics system. We focus on true real time display, images being computed at frame rate, i.e 50 (or 60) times a second. The I.M.O.G.E.N.E. machine uses no frame buffer. We use a massive object parallelism; the graphics module is made of a large number of object-processors, each one handling one graphics primitive at pixel rate in rasterscan order. Shading computations are made in a deferred shading processor using Phong's method. After a brief presentation of Object-Oriented Architectures, we present new details about the hardware implementation of our Object Processors, and describe for the first time the shading processor.\",\"PeriodicalId\":206166,\"journal\":{\"name\":\"Advances in Computer Graphics Hardware\",\"volume\":\"16 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"1991-09-01\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"0\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"Advances in Computer Graphics Hardware\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.2312/EGGH/EGGH91/054-073\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"Advances in Computer Graphics Hardware","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.2312/EGGH/EGGH91/054-073","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
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摘要

I.M.O.G.E.N.E.项目的目标是定义一个实时图形系统。我们专注于真正的实时显示,图像以帧率计算,即每秒50(或60)次。I.M.O.G.E.N.E.机器不使用帧缓冲。我们使用大量的对象并行;图形模块由大量的对象处理器组成,每个对象处理器按光栅扫描顺序以像素率处理一个图形原语。使用Phong的方法在延迟着色处理器中进行着色计算。在简要介绍了面向对象的体系结构之后,我们介绍了关于对象处理器硬件实现的新细节,并首次描述了着色处理器。
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The I.M.O.G.E.N.E. Machine: Some Hardware Elements
The goal of the I.M.O.G.E.N.E. project is to define a real time graphics system. We focus on true real time display, images being computed at frame rate, i.e 50 (or 60) times a second. The I.M.O.G.E.N.E. machine uses no frame buffer. We use a massive object parallelism; the graphics module is made of a large number of object-processors, each one handling one graphics primitive at pixel rate in rasterscan order. Shading computations are made in a deferred shading processor using Phong's method. After a brief presentation of Object-Oriented Architectures, we present new details about the hardware implementation of our Object Processors, and describe for the first time the shading processor.
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