低功耗435 mhz SOI CMOS LNA和混频器

IEEE MTT-S International Microwave Symposium Digest, 2003 Pub Date : 2003-06-08 DOI:10.1109/MWSYM.2003.1210999

E. Zencir, N. Dogan, E. Arvas

{"title":"低功耗435 mhz SOI CMOS LNA和混频器","authors":"E. Zencir, N. Dogan, E. Arvas","doi":"10.1109/MWSYM.2003.1210999","DOIUrl":null,"url":null,"abstract":"A low-power 435-MHz single-ended low-noise amplifier and a double-balanced mixer was implemented in a 0.35-/spl mu/m Silicon On Insulator (SOI) CMOS process. The single-ended LNA has a measured noise figure of 2.91 dB, and the mixer has an input third-order intercept point of +20 dBm. Total power dissipation of the LNA and mixer is 24 mW from a 2.5-V supply. This is the first LNA-mixer pair implemented at 435 MHz using an SOI CMOS process.","PeriodicalId":252251,"journal":{"name":"IEEE MTT-S International Microwave Symposium Digest, 2003","volume":"56 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2003-06-08","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"7","resultStr":"{\"title\":\"A low-power 435-MHz SOI CMOS LNA and mixer\",\"authors\":\"E. Zencir, N. Dogan, E. Arvas\",\"doi\":\"10.1109/MWSYM.2003.1210999\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"A low-power 435-MHz single-ended low-noise amplifier and a double-balanced mixer was implemented in a 0.35-/spl mu/m Silicon On Insulator (SOI) CMOS process. The single-ended LNA has a measured noise figure of 2.91 dB, and the mixer has an input third-order intercept point of +20 dBm. Total power dissipation of the LNA and mixer is 24 mW from a 2.5-V supply. This is the first LNA-mixer pair implemented at 435 MHz using an SOI CMOS process.\",\"PeriodicalId\":252251,\"journal\":{\"name\":\"IEEE MTT-S International Microwave Symposium Digest, 2003\",\"volume\":\"56 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2003-06-08\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"7\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"IEEE MTT-S International Microwave Symposium Digest, 2003\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/MWSYM.2003.1210999\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"IEEE MTT-S International Microwave Symposium Digest, 2003","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/MWSYM.2003.1210999","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}

引用次数: 7

摘要

采用0.35-/spl mu/m的SOI CMOS工艺，实现了低功耗435 mhz单端低噪声放大器和双平衡混频器。单端LNA的实测噪声系数为2.91 dB，混频器的输入三阶截距点为+20 dBm。LNA和混频器在2.5 v电源下的总功耗为24mw。这是第一个使用SOI CMOS工艺在435 MHz实现的lna混频器对。

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A low-power 435-MHz SOI CMOS LNA and mixer

A low-power 435-MHz single-ended low-noise amplifier and a double-balanced mixer was implemented in a 0.35-/spl mu/m Silicon On Insulator (SOI) CMOS process. The single-ended LNA has a measured noise figure of 2.91 dB, and the mixer has an input third-order intercept point of +20 dBm. Total power dissipation of the LNA and mixer is 24 mW from a 2.5-V supply. This is the first LNA-mixer pair implemented at 435 MHz using an SOI CMOS process.

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IEEE MTT-S International Microwave Symposium Digest, 2003

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