G. Sasso, C. Maneux, J. Boeck, V. d’Alessandro, K. Aufinger, T. Zimmer, N. Rinaldi
{"title":"高速SiGe HBTs中电压应力诱导热载子效应的评估与建模","authors":"G. Sasso, C. Maneux, J. Boeck, V. d’Alessandro, K. Aufinger, T. Zimmer, N. Rinaldi","doi":"10.1109/CSICS.2014.6978552","DOIUrl":null,"url":null,"abstract":"Hot-carrier degradation analysis and modeling of 240/380 GHz fT/fMAX SiGe HBTs are addressed. A proper stress bias setup is proposed, suitable for the evaluation of RF performance during stress interruption. The impact of stress conditions, lateral scaling and device layout is discussed. An analytical model is proposed, which predicts base current degradation, including its dependence upon stress voltage, stress duration, and emitter geometry, and contributes to understand the physical background of the phenomena.","PeriodicalId":309722,"journal":{"name":"2014 IEEE Compound Semiconductor Integrated Circuit Symposium (CSICS)","volume":null,"pages":null},"PeriodicalIF":0.0000,"publicationDate":"2014-12-18","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"4","resultStr":"{\"title\":\"Evaluation and Modeling of Voltage Stress-Induced Hot Carrier Effects in High-Speed SiGe HBTs\",\"authors\":\"G. Sasso, C. Maneux, J. Boeck, V. d’Alessandro, K. Aufinger, T. Zimmer, N. Rinaldi\",\"doi\":\"10.1109/CSICS.2014.6978552\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"Hot-carrier degradation analysis and modeling of 240/380 GHz fT/fMAX SiGe HBTs are addressed. A proper stress bias setup is proposed, suitable for the evaluation of RF performance during stress interruption. The impact of stress conditions, lateral scaling and device layout is discussed. An analytical model is proposed, which predicts base current degradation, including its dependence upon stress voltage, stress duration, and emitter geometry, and contributes to understand the physical background of the phenomena.\",\"PeriodicalId\":309722,\"journal\":{\"name\":\"2014 IEEE Compound Semiconductor Integrated Circuit Symposium (CSICS)\",\"volume\":null,\"pages\":null},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2014-12-18\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"4\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2014 IEEE Compound Semiconductor Integrated Circuit Symposium (CSICS)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/CSICS.2014.6978552\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2014 IEEE Compound Semiconductor Integrated Circuit Symposium (CSICS)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/CSICS.2014.6978552","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
Evaluation and Modeling of Voltage Stress-Induced Hot Carrier Effects in High-Speed SiGe HBTs
Hot-carrier degradation analysis and modeling of 240/380 GHz fT/fMAX SiGe HBTs are addressed. A proper stress bias setup is proposed, suitable for the evaluation of RF performance during stress interruption. The impact of stress conditions, lateral scaling and device layout is discussed. An analytical model is proposed, which predicts base current degradation, including its dependence upon stress voltage, stress duration, and emitter geometry, and contributes to understand the physical background of the phenomena.
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