L. B. Yew, C. Francis, S. Mohamed, Tang Wye Mun, L. Ki
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Development and optimization of substrate failure analysis techniques for chip scale packages
This paper details failure analysis techniques developed to analyze failures of two types of substrate widely used in chip scale packages (CSPs): (a) tape CSP substrate with polyimide (PI) tape, and (b) laminate CSP substrate with bismaleimide-triazine (BT) resin. The structure of both tape and laminate CSP substrates are discussed in detail to aid in understanding the failure analysis techniques of both these materials.
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