一种用于在线测试的改进CMOS BICS

Y. Maidon, Y. Deval, J. Bégueret
{"title":"一种用于在线测试的改进CMOS BICS","authors":"Y. Maidon, Y. Deval, J. Bégueret","doi":"10.1109/OLT.2000.856620","DOIUrl":null,"url":null,"abstract":"Dedicated to a wide range of power supplies current monitoring, a new version of a CMOS built-in current sensor is proposed. It takes advantage of the classical parasitic resistor attached to an interconnection layer, as well as to a feedback circuit with high static gain capability. Analysis and simulation reveal that the transducer is accurate, linear and transparent. Process dependencies are taken into account. The sensor was designed in a 0.6 /spl mu/m technology and its simulated characteristics are reported in this paper.","PeriodicalId":334770,"journal":{"name":"Proceedings 6th IEEE International On-Line Testing Workshop (Cat. No.PR00646)","volume":"22 24 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2000-07-03","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"4","resultStr":"{\"title\":\"An improved CMOS BICS for on-line testing\",\"authors\":\"Y. Maidon, Y. Deval, J. Bégueret\",\"doi\":\"10.1109/OLT.2000.856620\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"Dedicated to a wide range of power supplies current monitoring, a new version of a CMOS built-in current sensor is proposed. It takes advantage of the classical parasitic resistor attached to an interconnection layer, as well as to a feedback circuit with high static gain capability. Analysis and simulation reveal that the transducer is accurate, linear and transparent. Process dependencies are taken into account. The sensor was designed in a 0.6 /spl mu/m technology and its simulated characteristics are reported in this paper.\",\"PeriodicalId\":334770,\"journal\":{\"name\":\"Proceedings 6th IEEE International On-Line Testing Workshop (Cat. No.PR00646)\",\"volume\":\"22 24 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2000-07-03\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"4\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"Proceedings 6th IEEE International On-Line Testing Workshop (Cat. No.PR00646)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/OLT.2000.856620\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"Proceedings 6th IEEE International On-Line Testing Workshop (Cat. No.PR00646)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/OLT.2000.856620","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 4

摘要

本文提出了一种新型的CMOS内置电流传感器,用于各种电源的电流监测。它利用了连接在互连层上的传统寄生电阻,以及具有高静态增益能力的反馈电路。分析和仿真表明,该传感器具有精确、线性和透明的特点。过程依赖关系被考虑在内。本文采用0.6 /spl mu/m的工艺设计了传感器,并报道了传感器的仿真特性。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
查看原文
分享 分享
微信好友 朋友圈 QQ好友 复制链接
本刊更多论文
An improved CMOS BICS for on-line testing
Dedicated to a wide range of power supplies current monitoring, a new version of a CMOS built-in current sensor is proposed. It takes advantage of the classical parasitic resistor attached to an interconnection layer, as well as to a feedback circuit with high static gain capability. Analysis and simulation reveal that the transducer is accurate, linear and transparent. Process dependencies are taken into account. The sensor was designed in a 0.6 /spl mu/m technology and its simulated characteristics are reported in this paper.
求助全文
通过发布文献求助,成功后即可免费获取论文全文。 去求助
来源期刊
自引率
0.00%
发文量
0
期刊最新文献
Self-testing of FPGA delay faults in the system environment New self-checking circuits by use of Berger-codes On-line current testing for a microprocessor based application with an off-chip sensor Evaluating the effectiveness of a software fault-tolerance technique on RISC- and CISC-based architectures A compact built-in current sensor for I/sub DDQ/ testing
×
引用
GB/T 7714-2015
复制
MLA
复制
APA
复制
导出至
BibTeX EndNote RefMan NoteFirst NoteExpress
×
×
提示
您的信息不完整,为了账户安全,请先补充。
现在去补充
×
提示
您因"违规操作"
具体请查看互助需知
我知道了
×
提示
现在去查看 取消
×
提示
确定
0
微信
客服QQ
Book学术公众号 扫码关注我们
反馈
×
意见反馈
请填写您的意见或建议
请填写您的手机或邮箱
已复制链接
已复制链接
快去分享给好友吧!
我知道了
×
扫码分享
扫码分享
Book学术官方微信
Book学术文献互助
Book学术文献互助群
群 号:481959085
Book学术
文献互助 智能选刊 最新文献 互助须知 联系我们:info@booksci.cn
Book学术提供免费学术资源搜索服务,方便国内外学者检索中英文文献。致力于提供最便捷和优质的服务体验。
Copyright © 2023 Book学术 All rights reserved.
ghs 京公网安备 11010802042870号 京ICP备2023020795号-1