具有抗EMC能力的容错接口应用的ESD保护设计

2016 38th Electrical Overstress/Electrostatic Discharge Symposium (EOS/ESD) Pub Date : 2016-09-01 DOI:10.1109/EOSESD.2016.7592549

S. Parthasarathy, J. Salcedo, A. Jeffry, R. Gobbi, J. Hajjar

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引用次数: 0

摘要

介绍了一种工作电压大于80v且具有双向阻断能力的保护电路。该电路达到了所需的8,000 V HBM稳健性水平，保持电压大于80 V，反向阻断电压高于-20 V，直接射频功率注入(DPI)抗扰度为18 dBm，范围为5至500 mhz。

本文章由计算机程序翻译，如有差异，请以英文原文为准。

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Design of ESD protection for fault tolerant interface applications with EMC immunity

A protection circuit for larger than 80 V operation and bidirectional blocking capability is introduced. This circuit achieves a required 8,000 V HBM robustness level, a holding voltage larger than 80 V, a reverse blocking voltage higher than -20 V and 18 dBm Direct RF Power Injection (DPI) immunity between 5- to 500-MHz.

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2016 38th Electrical Overstress/Electrostatic Discharge Symposium (EOS/ESD)

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