{"title":"收缩阵列测试的时间复杂度","authors":"N. Faroughi","doi":"10.1109/DFTVS.1992.224373","DOIUrl":null,"url":null,"abstract":"The testing time for a C-testable orthogonal iterative systolic array (OISA) is derived where no knowledge on cell functions are assumed. The test inputs are regenerated as inputs for some inner cells at some future times at known distances (regeneration distances) from the outputs of those cells which are currently being tested. For minimum test time, it is required that the test input with maximum regeneration distance be applied last. For the non-OISAs, reconfigurable functional routers in each cell is proposed. A non-OISA can be reconfigured into one or more OISAs.<<ETX>>","PeriodicalId":319218,"journal":{"name":"Proceedings 1992 IEEE International Workshop on Defect and Fault Tolerance in VLSI Systems","volume":"376 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"1992-11-04","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"1","resultStr":"{\"title\":\"Time complexity of systolic array testing\",\"authors\":\"N. Faroughi\",\"doi\":\"10.1109/DFTVS.1992.224373\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"The testing time for a C-testable orthogonal iterative systolic array (OISA) is derived where no knowledge on cell functions are assumed. The test inputs are regenerated as inputs for some inner cells at some future times at known distances (regeneration distances) from the outputs of those cells which are currently being tested. For minimum test time, it is required that the test input with maximum regeneration distance be applied last. For the non-OISAs, reconfigurable functional routers in each cell is proposed. A non-OISA can be reconfigured into one or more OISAs.<<ETX>>\",\"PeriodicalId\":319218,\"journal\":{\"name\":\"Proceedings 1992 IEEE International Workshop on Defect and Fault Tolerance in VLSI Systems\",\"volume\":\"376 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"1992-11-04\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"1\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"Proceedings 1992 IEEE International Workshop on Defect and Fault Tolerance in VLSI Systems\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/DFTVS.1992.224373\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"Proceedings 1992 IEEE International Workshop on Defect and Fault Tolerance in VLSI Systems","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/DFTVS.1992.224373","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
The testing time for a C-testable orthogonal iterative systolic array (OISA) is derived where no knowledge on cell functions are assumed. The test inputs are regenerated as inputs for some inner cells at some future times at known distances (regeneration distances) from the outputs of those cells which are currently being tested. For minimum test time, it is required that the test input with maximum regeneration distance be applied last. For the non-OISAs, reconfigurable functional routers in each cell is proposed. A non-OISA can be reconfigured into one or more OISAs.<>
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