Al2O3栅极电介质的AlGaN/GaN-on-Si杂化MOS-HFET

A. Corrion, M. Chen, R. Chu, S. Burnham, S. Khalil, D. Zehnder, B. Hughes, K. Boutros
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引用次数: 7

摘要

基于氮化镓的hfet具有高击穿场、高电流密度和低导通电阻的特点,非常适合于功率开关应用。由于电路简单和安全,常关场效应管在功率开关应用中是首选。最近,一种新型的常关GaN器件被报道:混合金属氧化物半导体(MOS)-或金属绝缘体半导体(MIS)- hfet,由MOS型结构的栅极下的常关工作和hfet类结构的低导通电阻组成[1-6]。由于栅极电极下的电子直接与栅极绝缘体接触,因此优化绝缘体-外延层界面和绝缘体质量对这类器件至关重要。以前的报道使用了等离子体增强化学气相沉积(PECVD)方法沉积SiO2或SiN栅极介质的mos - hfet。然而,替代的沉积方法,如原子层沉积(ALD)已被证明具有优越的厚度控制,均匀性,共形性和薄膜质量,而ALD高k栅极电介质,如Al2O3,由于优异的GaN界面质量,已经对GaN hfet产生了极大的兴趣。在这项工作中,我们使用栅极凹槽蚀刻结合ALD Al2O3栅极介质在(111)Si衬底上制造了AlGaN/GaN杂化mos - hfet,具有低栅极泄漏,低导通电阻和高击穿电压。栅极制造工艺经过优化,减少了与电介质相关的陷阱密度,并消除了阈值电压滞后,这可能是由于电介质或介电-外电界面的缓慢陷阱造成的[7]。在栅极外设为20 mm、比导通电阻(Ron)为9.0 mΩ-cm2的器件上,在0V栅极偏置下测得1370V的三端击穿电压(VB)。由此产生的VB2/Ron值为208 MW/cm2,是迄今为止报道的正常关闭GaN-on-Si hfet的最高值之一。
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Normally-off gate-recessed AlGaN/GaN-on-Si hybrid MOS-HFET with Al2O3 gate dielectric
GaN-based HFETs offer a combination of high breakdown field, high current densities, and low on-resistance, making them well-suited for power-switching applications. Normally-off FETs are preferred in power switching applications for circuit simplicity and safety. Recently, a new type of normally-off GaN device has been reported: the hybrid metal-oxide-semiconductor (MOS)- or metal-insulator-semiconductor (MIS)-HFET, consisting of an MOS-type structure under the gate for normally-off operation and an HFET-like structure in the access regions for low on-resistance [1–6]. Optimization of the insulator-epi interface and insulator quality is critical for this type of device, since the electrons under gate electrode are in direct contact with the gate insulator. Previous reports of hybrid MOS-HFETs used SiO2 or SiN gate dielectrics deposited by plasma-enhanced chemical vapor deposition (PECVD). However, alternative deposition methods such as atomic layer deposition (ALD) have been shown to result in superior thickness control, uniformity, conformality, and film quality, while ALD high-k gate dielectrics such as Al2O3 have generated significant interest for GaN HFETs due to excellent GaN interface quality. In this work, we fabricated normally-off AlGaN/GaN hybrid MOS-HFETs on (111) Si substrates using gate recess etching combined with an ALD Al2O3 gate dielectric for low gate leakage, low on-resistance, and high breakdown voltage. The gate fabrication process was optimized to reduce the trap density associated with the dielectric and eliminate threshold voltage hysteresis, which can result from slow traps in the dielectric or at the dielectric-epi interface [7]. A three-terminal breakdown voltage (VB) of 1370V was measured at a gate bias of 0 V on a device with a 20 mm gate periphery and a low specific on-resistance (Ron) of 9.0 mΩ-cm2. The resulting VB2/Ron figure of merit of 208 MW/cm2 is among the highest values reported to-date for normally-off GaN-on-Si HFETs.
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