输入电容为1.2 pf的10位12ms /s连续近似ADC

2009 IEEE Asian Solid-State Circuits Conference Pub Date : 2009-12-22 DOI:10.1109/ASSCC.2009.5357202

Guan-Ying Huang, Chun-Cheng Liu, Ying-Zu Lin, Soon-Jyh Chang

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引用次数: 26

摘要

本文报道了一种低输入电容的连续逼近模数转换器(ADC)。该10位原型机采用0.13 μ m CMOS工艺制造。与传统的逐次逼近ADC相比，所提出的ADC在10位分辨率下将输入电容降低到1.2 pF。在12 MS/s和1.2 v电源下，该ADC功耗为0.32 mW, SNDR为50.89 dB, FOM为95 fJ/转换步长。

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A 10-bit 12-MS/s successive approximation ADC with 1.2-pF input capacitance

This paper reports a successive-approximation analog-to-digital converter (ADC) with low input capacitance. The 10-bit prototype is fabricated in a 0.13-µm CMOS process. Compared to conventional successive approximation ADCs, the proposed ADC reduces the input capacitance to 1.2 pF for 10-bit resolution. At 12 MS/s and 1.2-V supply, this ADC consumes 0.32 mW and achieves an SNDR of 50.89 dB, resulting in an FOM of 95 fJ/Conversion-step.

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2009 IEEE Asian Solid-State Circuits Conference

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