带有PLA地址修饰符的基于rom的有限状态机

T. Luba, K. Górski, L. Wronski
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引用次数: 13

摘要

介绍了顺序电路中地址修饰符合成的一种有效方法。该方法基于串行分解,大大降低了给定微程序存储器大小的地址修改器电路的复杂度。它可以有效地用于基于PMS的设计和完全定制的设计。该方法在PC机上用c++实现。它在标准有限状态机(FSM)基准上进行了测试。结果表明,在广泛的情况下,该方法提供了大量(超过50%)减少所需的ROM容量,这可能导致在实际的完全定制实现中节省硅面积。
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ROM-based finite state machines with PLA address modifiers
An effective method for the synthesis of address modifiers in sequential circuits is described. The method, based on serial decomposition, substantially reduces the address modifier circuit complexity for a given microprogram memory size. It can be used effectively for PMS based designs and for full custom designs. The method was implemented in C++ on a PC. It was tested on standard finite state machine (FSM) benchmarks. Results indicate that for a wide range of cases the method gives a substantial (more than 50%) reduction of required ROM capacity, which may result in a saving of the silicon area in the actual full custom implementation.<>
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