{"title":"一种用于移动生物医学系统的低功耗接收器架构","authors":"B. Fong, A. Fong, G. Hong","doi":"10.1109/EDSSC.2005.1635328","DOIUrl":null,"url":null,"abstract":"This paper presents a system on chip architecture for mobile telemedicine systems utilizing a wireless local area network at 5 GHz. The chip is designed to perform demodulation and filtering functions that supports a data throughput rate of 50 Mbps and is integrated in a wideband compressive receiver with very high mobility that supports paramedics attending an accident scene. It utilizes an adjustable on-chip clocking circuitry with external dynamic random access memory.","PeriodicalId":429314,"journal":{"name":"2005 IEEE Conference on Electron Devices and Solid-State Circuits","volume":"4 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2005-12-19","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"1","resultStr":"{\"title\":\"A Low Power Receiver Architecture for Mobile Biomedicine Systems\",\"authors\":\"B. Fong, A. Fong, G. Hong\",\"doi\":\"10.1109/EDSSC.2005.1635328\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"This paper presents a system on chip architecture for mobile telemedicine systems utilizing a wireless local area network at 5 GHz. The chip is designed to perform demodulation and filtering functions that supports a data throughput rate of 50 Mbps and is integrated in a wideband compressive receiver with very high mobility that supports paramedics attending an accident scene. It utilizes an adjustable on-chip clocking circuitry with external dynamic random access memory.\",\"PeriodicalId\":429314,\"journal\":{\"name\":\"2005 IEEE Conference on Electron Devices and Solid-State Circuits\",\"volume\":\"4 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2005-12-19\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"1\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2005 IEEE Conference on Electron Devices and Solid-State Circuits\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/EDSSC.2005.1635328\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2005 IEEE Conference on Electron Devices and Solid-State Circuits","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/EDSSC.2005.1635328","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
A Low Power Receiver Architecture for Mobile Biomedicine Systems
This paper presents a system on chip architecture for mobile telemedicine systems utilizing a wireless local area network at 5 GHz. The chip is designed to perform demodulation and filtering functions that supports a data throughput rate of 50 Mbps and is integrated in a wideband compressive receiver with very high mobility that supports paramedics attending an accident scene. It utilizes an adjustable on-chip clocking circuitry with external dynamic random access memory.
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