An 18nm ePCM with BJT selector NVM design for advanced microcontroller applications

In this paper, the competitive advantage of Phase Change Memory (PCM) with BJT selector in 18nm FDSOI technology is explained. Starting from Microcontrollers requirements and architectures, the impact of technology features and device flavor in high performance and low-cost Microcontrollers is analyzed in section I, while the peculiarities of ePCM cell with BJT selector and its high-density advantages vs other NVM Back End solutions are illustrated in section II. The ePCM NVM IP Architecture constraints are presented in section III with particular emphasis on the need to split the arrays in Tiles. In section IV the impact of BJT selector in Reading Architecture is discussed showing the limits of classical solution and introducing a reading technique using multiple voltage domains sensing for Low Power Micros. Experimental results on a dedicated Test Vehicle are illustrated in section V.