{"title":"采用0.5 um增强/耗尽模式GaAs pHEMT的30ghz单片锁相环MMIC","authors":"F. Huang, Cheng-Kuo Lin, Yu-Chi Wang, Y. Chan","doi":"10.1109/CSICS07.2007.43","DOIUrl":null,"url":null,"abstract":"A phase-locked loop (PLL) MMIC based on a ring-type injection-locked frequency divider (RILFD) and a cascode-type voltage-controlled oscillator (VCO) has been manufactured by using 0.5 mum enhanced/depletion mode (E/D) GaAs pHEMTs for Ka-band communications. In this circuit, the 15 GHz cascode oscillator including the 2nd harmonic cascode buffer amplifier was designed to generate a 30 GHz output signal. To synchronize the oscillation signal with the input reference signal, the wide locking-range divided-by-four RILFD using injection-locked technique and the cascode mixer to be a phase detector were used with a reference signal of 3.75 GHz. With a RC low-pass filter and a dc amplifier based on the E/D-mode inverter circuit, the loop gain and the output phase noise can be further improved. The measured result of the locking range is about 400 MHz near 30 GHz and the output phase noise is about -116 dBc/Hz at 1 MHz offset under a 2 V dc supply with 80 mW power consumption.","PeriodicalId":370697,"journal":{"name":"2007 IEEE Compound Semiconductor Integrated Circuits Symposium","volume":"57 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2007-11-19","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"2","resultStr":"{\"title\":\"A 30 GHz Single-Chip PLL MMIC Using 0.5 um Enhanced/Depletion-Mode GaAs pHEMT\",\"authors\":\"F. Huang, Cheng-Kuo Lin, Yu-Chi Wang, Y. Chan\",\"doi\":\"10.1109/CSICS07.2007.43\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"A phase-locked loop (PLL) MMIC based on a ring-type injection-locked frequency divider (RILFD) and a cascode-type voltage-controlled oscillator (VCO) has been manufactured by using 0.5 mum enhanced/depletion mode (E/D) GaAs pHEMTs for Ka-band communications. In this circuit, the 15 GHz cascode oscillator including the 2nd harmonic cascode buffer amplifier was designed to generate a 30 GHz output signal. To synchronize the oscillation signal with the input reference signal, the wide locking-range divided-by-four RILFD using injection-locked technique and the cascode mixer to be a phase detector were used with a reference signal of 3.75 GHz. With a RC low-pass filter and a dc amplifier based on the E/D-mode inverter circuit, the loop gain and the output phase noise can be further improved. The measured result of the locking range is about 400 MHz near 30 GHz and the output phase noise is about -116 dBc/Hz at 1 MHz offset under a 2 V dc supply with 80 mW power consumption.\",\"PeriodicalId\":370697,\"journal\":{\"name\":\"2007 IEEE Compound Semiconductor Integrated Circuits Symposium\",\"volume\":\"57 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2007-11-19\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"2\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2007 IEEE Compound Semiconductor Integrated Circuits Symposium\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/CSICS07.2007.43\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2007 IEEE Compound Semiconductor Integrated Circuits Symposium","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/CSICS07.2007.43","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
A 30 GHz Single-Chip PLL MMIC Using 0.5 um Enhanced/Depletion-Mode GaAs pHEMT
A phase-locked loop (PLL) MMIC based on a ring-type injection-locked frequency divider (RILFD) and a cascode-type voltage-controlled oscillator (VCO) has been manufactured by using 0.5 mum enhanced/depletion mode (E/D) GaAs pHEMTs for Ka-band communications. In this circuit, the 15 GHz cascode oscillator including the 2nd harmonic cascode buffer amplifier was designed to generate a 30 GHz output signal. To synchronize the oscillation signal with the input reference signal, the wide locking-range divided-by-four RILFD using injection-locked technique and the cascode mixer to be a phase detector were used with a reference signal of 3.75 GHz. With a RC low-pass filter and a dc amplifier based on the E/D-mode inverter circuit, the loop gain and the output phase noise can be further improved. The measured result of the locking range is about 400 MHz near 30 GHz and the output phase noise is about -116 dBc/Hz at 1 MHz offset under a 2 V dc supply with 80 mW power consumption.