{"title":"第二代实时细胞神经网络处理器RTCNNP-v2的演示","authors":"N. Yildiz, E. Cesur, V. Tavsanoglu","doi":"10.1109/CNNA.2012.6331471","DOIUrl":null,"url":null,"abstract":"This proceeding is compiled from our previous works, where architecture of the Second-Generation Real-Time Cellular Neural Network (CNN) Processor (RTCNNP-v2) was proposed. The system is designed for applications where high-resolution and high-speed is desired. The structure is fully-pipelined and the processing is real-time. Proposed structure is coded in VHDL and realized on two FPGA devices: one high-end and one low-budget. The system is the only reported CNN implementation supporting real-time Full-HD video image processing, to date.","PeriodicalId":387536,"journal":{"name":"2012 13th International Workshop on Cellular Nanoscale Networks and their Applications","volume":"114 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2012-10-18","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"6","resultStr":"{\"title\":\"Demonstration of the Second Generation Real-Time Cellular Neural Network Processor: RTCNNP-v2\",\"authors\":\"N. Yildiz, E. Cesur, V. Tavsanoglu\",\"doi\":\"10.1109/CNNA.2012.6331471\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"This proceeding is compiled from our previous works, where architecture of the Second-Generation Real-Time Cellular Neural Network (CNN) Processor (RTCNNP-v2) was proposed. The system is designed for applications where high-resolution and high-speed is desired. The structure is fully-pipelined and the processing is real-time. Proposed structure is coded in VHDL and realized on two FPGA devices: one high-end and one low-budget. The system is the only reported CNN implementation supporting real-time Full-HD video image processing, to date.\",\"PeriodicalId\":387536,\"journal\":{\"name\":\"2012 13th International Workshop on Cellular Nanoscale Networks and their Applications\",\"volume\":\"114 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2012-10-18\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"6\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2012 13th International Workshop on Cellular Nanoscale Networks and their Applications\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/CNNA.2012.6331471\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2012 13th International Workshop on Cellular Nanoscale Networks and their Applications","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/CNNA.2012.6331471","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
Demonstration of the Second Generation Real-Time Cellular Neural Network Processor: RTCNNP-v2
This proceeding is compiled from our previous works, where architecture of the Second-Generation Real-Time Cellular Neural Network (CNN) Processor (RTCNNP-v2) was proposed. The system is designed for applications where high-resolution and high-speed is desired. The structure is fully-pipelined and the processing is real-time. Proposed structure is coded in VHDL and realized on two FPGA devices: one high-end and one low-budget. The system is the only reported CNN implementation supporting real-time Full-HD video image processing, to date.