一个6.5 GHz 130 nm单端动态ALU和指令调度回路

2002 IEEE International Solid-State Circuits Conference. Digest of Technical Papers (Cat. No.02CH37315) Pub Date : 2002-08-07 DOI:10.1109/ISSCC.2002.993106

M. Anders, S. Mathew, B. Bloechel, S. Thompson, R. Krishnamurthy, K. Soumyanath, S. Borkar

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引用次数: 21

摘要

32b Han-Carlson ALU和8入口/spl次/ 2-ALU指令调度程序环路，用于1.2 V和25/spl度/C的6.5 GHz单周期整数执行，使用双vt CMOS技术。与Koggie-Stone方案相比，单端耐漏动态方案可实现高达9宽的or，关键路径速度提高23%，主动泄漏功率降低40%，密集布局占用44.100 /spl mu/m/sup 2/，在1.5 V, 25/spl度/C下可扩展到8 GHz。

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A 6.5 GHz 130 nm single-ended dynamic ALU and instruction-scheduler loop

32b Han-Carlson ALU and 8-entry /spl times/ 2-ALU instruction scheduler loop for 6.5 GHz single-cycle integer execution at 1.2 V and 25/spl deg/C uses dual-Vt CMOS technology. A single-ended, leakage-tolerant dynamic scheme enables up to 9-wide ORs with 23% critical path speed improvement, 40% active leakage power reduction compared to Koggie-Stone implementation, dense layout occupying 44, 100 /spl mu/m/sup 2/, and performance scalable to 8 GHz at 1.5 V, 25/spl deg/C.

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2002 IEEE International Solid-State Circuits Conference. Digest of Technical Papers (Cat. No.02CH37315)

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