一种CMOS以太网串行接口芯片

1984 IEEE International Solid-State Circuits Conference. Digest of Technical Papers Pub Date : 1900-01-01 DOI:10.1109/ISSCC.1984.1156697

Haw-Ming Haung, D. Banatao, G. Perlegos, Tsing-Ching Wu, Te-Long Chiu

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引用次数: 4

摘要

一个10MHz CMOS以太网曼彻斯特编码器/解码器将被描述。通过使用锁相环，该设备可以解码具有18ns抖动的数据。发射器直接驱动78欧姆的收发电缆，斜度小于0.5ns。芯片(2μm/ n孔)为99 × 115mil2，功耗为150mW。

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A CMOS ethernet serial interface chip

A 10MHz CMOS Ethernet Manchester encoder/decoder will be described. By using a PLL, the device can decode data having 18ns of jitter. The transmitter drives a 78-ohm transceiver cable directly with less than a 0.5ns skew. The chip (2μm/N-well) is 99 × 115mil2and consumes 150mW.

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1984 IEEE International Solid-State Circuits Conference. Digest of Technical Papers

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