{"title":"基于残数算法的语音信号自相关系数流水线计算电路","authors":"A. Drolshagen, W. Anheier, C. Sekhar","doi":"10.1109/ICVD.1998.646589","DOIUrl":null,"url":null,"abstract":"This paper presents a new design for module multipliers suitable for moduli that are not necessarily prime. The design avoids the need for building special purpose look-up tables. An RNS arithmetic based autocorrelator circuit that uses a large number of these multipliers is designed. The paper also describes the automated design strategy using a hardware compiler for RNS, and presents the results of the synthesis.","PeriodicalId":139023,"journal":{"name":"Proceedings Eleventh International Conference on VLSI Design","volume":"38 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"1998-01-04","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"3","resultStr":"{\"title\":\"A residue number arithmetic based circuit for pipelined computation of autocorrelation coefficients of speech signal\",\"authors\":\"A. Drolshagen, W. Anheier, C. Sekhar\",\"doi\":\"10.1109/ICVD.1998.646589\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"This paper presents a new design for module multipliers suitable for moduli that are not necessarily prime. The design avoids the need for building special purpose look-up tables. An RNS arithmetic based autocorrelator circuit that uses a large number of these multipliers is designed. The paper also describes the automated design strategy using a hardware compiler for RNS, and presents the results of the synthesis.\",\"PeriodicalId\":139023,\"journal\":{\"name\":\"Proceedings Eleventh International Conference on VLSI Design\",\"volume\":\"38 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"1998-01-04\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"3\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"Proceedings Eleventh International Conference on VLSI Design\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/ICVD.1998.646589\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"Proceedings Eleventh International Conference on VLSI Design","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ICVD.1998.646589","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
A residue number arithmetic based circuit for pipelined computation of autocorrelation coefficients of speech signal
This paper presents a new design for module multipliers suitable for moduli that are not necessarily prime. The design avoids the need for building special purpose look-up tables. An RNS arithmetic based autocorrelator circuit that uses a large number of these multipliers is designed. The paper also describes the automated design strategy using a hardware compiler for RNS, and presents the results of the synthesis.