{"title":"利用FPGA技术设计一个Java微处理器内核","authors":"A. Kim, M. Chang","doi":"10.1109/ASIC.1998.722787","DOIUrl":null,"url":null,"abstract":"Ever since its introduction from Sun Microsystems three years ago, Java has been widely accepted in the computing and Internet industry. However the run-time performance is still not good enough for Java to become a general purpose programming language. This paper shows how to implement a Java microprocessor core in silicon to speed up the execution of Java. For a reconfigurable and flexible design, the Field Programmable Gate Array (FPGA) is chosen as a target technology for the Java microprocessor. By applying a top-down hardware design methodology to the FPGA design process, it becomes easier and more flexible to implement Java in a FPGA. The DFT technique is added for better testability.","PeriodicalId":104431,"journal":{"name":"Proceedings Eleventh Annual IEEE International ASIC Conference (Cat. No.98TH8372)","volume":"16 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"1998-09-13","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"15","resultStr":"{\"title\":\"Designing a Java microprocessor core using FPGA technology\",\"authors\":\"A. Kim, M. Chang\",\"doi\":\"10.1109/ASIC.1998.722787\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"Ever since its introduction from Sun Microsystems three years ago, Java has been widely accepted in the computing and Internet industry. However the run-time performance is still not good enough for Java to become a general purpose programming language. This paper shows how to implement a Java microprocessor core in silicon to speed up the execution of Java. For a reconfigurable and flexible design, the Field Programmable Gate Array (FPGA) is chosen as a target technology for the Java microprocessor. By applying a top-down hardware design methodology to the FPGA design process, it becomes easier and more flexible to implement Java in a FPGA. The DFT technique is added for better testability.\",\"PeriodicalId\":104431,\"journal\":{\"name\":\"Proceedings Eleventh Annual IEEE International ASIC Conference (Cat. No.98TH8372)\",\"volume\":\"16 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"1998-09-13\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"15\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"Proceedings Eleventh Annual IEEE International ASIC Conference (Cat. No.98TH8372)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/ASIC.1998.722787\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"Proceedings Eleventh Annual IEEE International ASIC Conference (Cat. No.98TH8372)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ASIC.1998.722787","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
Designing a Java microprocessor core using FPGA technology
Ever since its introduction from Sun Microsystems three years ago, Java has been widely accepted in the computing and Internet industry. However the run-time performance is still not good enough for Java to become a general purpose programming language. This paper shows how to implement a Java microprocessor core in silicon to speed up the execution of Java. For a reconfigurable and flexible design, the Field Programmable Gate Array (FPGA) is chosen as a target technology for the Java microprocessor. By applying a top-down hardware design methodology to the FPGA design process, it becomes easier and more flexible to implement Java in a FPGA. The DFT technique is added for better testability.