{"title":"标准CMOS技术中的高效全波整流器","authors":"G. Bawa, Uei-Ming Jow, Maysam Ghovanloo","doi":"10.1109/MWSCAS.2007.4488545","DOIUrl":null,"url":null,"abstract":"In this paper, a high efficiency full-wave integrated voltage rectifier, implemented in AMI 0.5-mum 3M/2P n-well standard CMOS process, is presented. The rectifier takes advantage of the dynamic voltage control of separated n-well regions, where the main rectifying PMOS elements have been implemented, to eliminate latchup and body effect. In measurements, an AC input sinusoid of 5 V peak at 0.5 MHz yield a 4.36 V DC output across a 1 kOmega load, resulting in a measured power conversion efficiency of 85%.","PeriodicalId":256061,"journal":{"name":"2007 50th Midwest Symposium on Circuits and Systems","volume":"54 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2007-08-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"12","resultStr":"{\"title\":\"A high efficiency full-wave rectifier in standard CMOS Technology\",\"authors\":\"G. Bawa, Uei-Ming Jow, Maysam Ghovanloo\",\"doi\":\"10.1109/MWSCAS.2007.4488545\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"In this paper, a high efficiency full-wave integrated voltage rectifier, implemented in AMI 0.5-mum 3M/2P n-well standard CMOS process, is presented. The rectifier takes advantage of the dynamic voltage control of separated n-well regions, where the main rectifying PMOS elements have been implemented, to eliminate latchup and body effect. In measurements, an AC input sinusoid of 5 V peak at 0.5 MHz yield a 4.36 V DC output across a 1 kOmega load, resulting in a measured power conversion efficiency of 85%.\",\"PeriodicalId\":256061,\"journal\":{\"name\":\"2007 50th Midwest Symposium on Circuits and Systems\",\"volume\":\"54 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2007-08-01\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"12\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2007 50th Midwest Symposium on Circuits and Systems\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/MWSCAS.2007.4488545\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2007 50th Midwest Symposium on Circuits and Systems","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/MWSCAS.2007.4488545","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 12
摘要
本文介绍了一种采用AMI 0.5 μ m 3M/2P n阱标准CMOS工艺实现的高效全波集成电压整流器。整流器利用分离的n阱区动态电压控制，其中主要整流PMOS元件已经实现，以消除锁存和体效应。在测量中，交流输入正弦波在0.5 MHz时峰值为5 V，在1 kOmega负载上产生4.36 V的直流输出，导致测量的功率转换效率为85%。
A high efficiency full-wave rectifier in standard CMOS Technology
In this paper, a high efficiency full-wave integrated voltage rectifier, implemented in AMI 0.5-mum 3M/2P n-well standard CMOS process, is presented. The rectifier takes advantage of the dynamic voltage control of separated n-well regions, where the main rectifying PMOS elements have been implemented, to eliminate latchup and body effect. In measurements, an AC input sinusoid of 5 V peak at 0.5 MHz yield a 4.36 V DC output across a 1 kOmega load, resulting in a measured power conversion efficiency of 85%.
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