整体模式推动半导体制造业在2020年代及以后的发展

M. V. D. Brink, A. Yen, P. Wijnen, M. Lercel, B. Sluijk
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引用次数: 3

摘要

由于数十年来设备密度的经济高效扩展和几代新设备技术的发展,半导体使计算和信息存储的效率不断提高。我们相信,整体模式的持续进步将使半导体器件的成本效益扩展在整个2020年代及以后继续下去。我们在此介绍ASML整体产品组合的关键发展:极紫外(EUV)光刻路线图,其0.33数值孔径(NA)平台和下一代0.55 NA(高NA)平台,深紫外(DUV)路线图,包括尖端的浸入式光刻和经济高效的成熟系统,以及我们光学计量,电子束计量和检测组合的关键创新,以及我们的计算光刻技术。在大批量生产中,最终的光刻性能只有通过曝光系统、计量和检测工具以及计算光刻算法的整体结合才能实现。这包括设置过程中的过程窗口优化,过程能力的精确测量,以及保持在模式过程窗口内的主动控制。
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Holistic Patterning to Advance Semiconductor Manufacturing in the 2020s and Beyond
Semiconductors have enabled ever-increasing efficiency in compute and storage of information, as a result of decades of cost-effective scaling of device density and generations of new device technologies. We believe that continued advances in holistic patterning will enable cost-effective scaling of semiconductor devices to continue throughout the 2020s and beyond. We present here key developments across ASML’s holistic product portfolio: the extreme ultraviolet (EUV) lithography roadmap with its 0.33 numerical-aperture (NA) platform and the next-generation 0.55 NA (High-NA) platform, the deep ultraviolet (DUV) roadmap including cutting-edge immersion lithography and cost-efficient mature systems, and key innovations across our optical metrology, electron-beam metrology and inspection portfolio, and our computational lithographic technology. In high-volume manufacturing, the ultimate lithographic performance is only realized by the holistic combination of exposure systems, metrology and inspection tools, and computational-lithographic algorithms. This includes process window optimization during setup, accurate measurement of process capability, and active control to stay within the patterning process window.
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