Z. Krivokapic, U. Rana, R. Galatage, A. Razavieh, A. Aziz, J. Liu, J. Shi, H. Kim, R. Sporer, C. Serrao, A. Busquet, P. Polakowski, J. Müller, W. Kleemeier, A. Jacob, D. Brown, A. Knorr, R. Carter, S. Banna
{"title":"14nm铁电FinFET技术,具有陡峭的亚阈值斜率,适用于超低功耗应用","authors":"Z. Krivokapic, U. Rana, R. Galatage, A. Razavieh, A. Aziz, J. Liu, J. Shi, H. Kim, R. Sporer, C. Serrao, A. Busquet, P. Polakowski, J. Müller, W. Kleemeier, A. Jacob, D. Brown, A. Knorr, R. Carter, S. Banna","doi":"10.1109/IEDM.2017.8268393","DOIUrl":null,"url":null,"abstract":"Doped hafnia ferroelectric layers with thicknesses from 3 to 8nm are integrated into state-of-the-art 14nm FinFET technology without any further process modification. Ferroelectric devices show improved subthreshold slope (as low as 54mV/dec) and Idsat (up to 165% increase). C-V curves show slight ferroelectric hysteresis. For the first time, we show that ring oscillators with ferroelectric devices can operate at frequencies similar to regular dielectrics, while improved subthreshold slope reduces their active power. We also propose a model for ferroelectric MOSFETs that spans both negative (NCFET) and positive (PCFET) ferroelectric capacitance (CFE) devices. By carefully designed capacitance matching ferroelectric devices can provide significant power savings without sacrificing the speed.","PeriodicalId":412333,"journal":{"name":"2017 IEEE International Electron Devices Meeting (IEDM)","volume":"56 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2017-12-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"150","resultStr":"{\"title\":\"14nm Ferroelectric FinFET technology with steep subthreshold slope for ultra low power applications\",\"authors\":\"Z. Krivokapic, U. Rana, R. Galatage, A. Razavieh, A. Aziz, J. Liu, J. Shi, H. Kim, R. Sporer, C. Serrao, A. Busquet, P. Polakowski, J. Müller, W. Kleemeier, A. Jacob, D. Brown, A. Knorr, R. Carter, S. Banna\",\"doi\":\"10.1109/IEDM.2017.8268393\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"Doped hafnia ferroelectric layers with thicknesses from 3 to 8nm are integrated into state-of-the-art 14nm FinFET technology without any further process modification. Ferroelectric devices show improved subthreshold slope (as low as 54mV/dec) and Idsat (up to 165% increase). C-V curves show slight ferroelectric hysteresis. For the first time, we show that ring oscillators with ferroelectric devices can operate at frequencies similar to regular dielectrics, while improved subthreshold slope reduces their active power. We also propose a model for ferroelectric MOSFETs that spans both negative (NCFET) and positive (PCFET) ferroelectric capacitance (CFE) devices. By carefully designed capacitance matching ferroelectric devices can provide significant power savings without sacrificing the speed.\",\"PeriodicalId\":412333,\"journal\":{\"name\":\"2017 IEEE International Electron Devices Meeting (IEDM)\",\"volume\":\"56 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2017-12-01\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"150\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2017 IEEE International Electron Devices Meeting (IEDM)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/IEDM.2017.8268393\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2017 IEEE International Electron Devices Meeting (IEDM)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/IEDM.2017.8268393","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
14nm Ferroelectric FinFET technology with steep subthreshold slope for ultra low power applications
Doped hafnia ferroelectric layers with thicknesses from 3 to 8nm are integrated into state-of-the-art 14nm FinFET technology without any further process modification. Ferroelectric devices show improved subthreshold slope (as low as 54mV/dec) and Idsat (up to 165% increase). C-V curves show slight ferroelectric hysteresis. For the first time, we show that ring oscillators with ferroelectric devices can operate at frequencies similar to regular dielectrics, while improved subthreshold slope reduces their active power. We also propose a model for ferroelectric MOSFETs that spans both negative (NCFET) and positive (PCFET) ferroelectric capacitance (CFE) devices. By carefully designed capacitance matching ferroelectric devices can provide significant power savings without sacrificing the speed.