无胶带导联芯片(LOC)封装的开发

M. Amagai, R. Baumann, S. Kamei, M. Ohsumi, E. Kawasaki, H. Kitagawa
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引用次数: 6

摘要

在片上导联(LOC)封装中,双面胶带通常用作芯片和引线框架之间的绝缘体和机械缓冲层。与引线框架和胶带工艺相关的成本使当前的LOC封装比传统封装贵十倍。开发了一种新的无胶带LOC封装工艺,大大降低了生产成本。在这种新工艺中,胶带被沉积在聚酰亚胺涂层晶圆上的热塑性胶粘剂层所取代。本文介绍了粘接层的最佳热塑性材料性能,制作工艺参数,以及无胶带LOC封装的可靠性和性能的实验和模拟结果。
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Development of a tapeless lead-on-chip (LOC) package
A double-sided adhesive tape is typically used as an insulator and mechanical buffer layer between the chip and lead frame in lead-on-chip (LOC) packages. The costs associated with the lead frame and tape process make the current LOC package ten times more expensive than conventional packaging. A new tapeless LOC package process has been developed which significantly reduces the production costs. In this new process, the tape is replaced by a thermoplastic adhesive layer deposited on the polyimide coated wafer. This paper describes the optimum thermoplastic material properties for the adhesive layer, the fabrication process parameters, and the experimental and simulated reliability and performance results of the tapeless LOC package.<>
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