用于运行时可重构内存中计算加速器的BEOL兼容铁电路由器

A. Khanna, H. Ye, Y. Luo, G. Bajpai, M. Jose, W. Chakraborty, Shimeng Yu, P. Fay, S. Datta
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引用次数: 1

摘要

基于运行时可重构设计的内存计算(CIM)加速器在加速深度神经网络(DNN)推理方面显示出巨大的前景。在这里,我们提出了后端(BEOL)兼容的氧化铟钨沟道铁电晶体管(IWO FeFET)作为单片3D (M3D) CIM加速器的信号路由开关(RS)。通过建立的小信号等效电路模型,通过去嵌入晶体管的外部寄生得到晶体管的测量截止频率(fT)为2.45 GHz,本征频率(fT)大于11.5 GHz。通过晶体管配置测量显示,在2.5GHz编程和擦除状态之间,增加的延迟小于250ps,隔离小于15dB。实验证明了4路路由开关的运行时可重构操作具有优异的选择性和大于1010个周期的耐用性。采用IWO FeFET RS和权重的M3D CIM加速器在实际DNN模型上进行的系统级基准测试显示,与7nm SRAM设计相比,能效提高了2.5倍,面积效率提高了>10%。
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BEOL Compatible Ferroelectric Routers for Run-time Reconfigurable Compute-in-Memory Accelerators
Compute-in-memory (CIM) accelerators based on run-time reconfigurable designs have shown great promise in speeding up deep neural network (DNN) inferencing. Here, we present back-end-of-the-line (BEOL) compatible Indium Tungsten Oxide channel ferroelectric transistors (IWO FeFET) as signal routing switches (RS) for monolithic 3D (M3D) CIM accelerator. We demonstrate 2.45 GHz measured cutoff frequency (fT) for the transistor and greater than 11.5 GHz intrinsic fT by de-embedding transistor extrinsic parasitics obtained through developed small-signal equivalent circuit model. Pass-transistor configuration measurements show less than 250ps of added delay and 15dB of isolation at 2.5GHz between programmed and erased states. Run-time reconfigurable operation of a 4-way routing switch is experimentally demonstrated with excellent selectivity and endurance greater than 1010 cycles. System level benchmarking of a M3D CIM accelerator employing IWO FeFET RS and weights performed on real-word DNN models shows 2.5x improvement in energy efficiency and >10% gain in area efficiency compared to 7nm SRAM design.
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