A. Khanna, H. Ye, Y. Luo, G. Bajpai, M. Jose, W. Chakraborty, Shimeng Yu, P. Fay, S. Datta
{"title":"用于运行时可重构内存中计算加速器的BEOL兼容铁电路由器","authors":"A. Khanna, H. Ye, Y. Luo, G. Bajpai, M. Jose, W. Chakraborty, Shimeng Yu, P. Fay, S. Datta","doi":"10.1109/vlsitechnologyandcir46769.2022.9830498","DOIUrl":null,"url":null,"abstract":"Compute-in-memory (CIM) accelerators based on run-time reconfigurable designs have shown great promise in speeding up deep neural network (DNN) inferencing. Here, we present back-end-of-the-line (BEOL) compatible Indium Tungsten Oxide channel ferroelectric transistors (IWO FeFET) as signal routing switches (RS) for monolithic 3D (M3D) CIM accelerator. We demonstrate 2.45 GHz measured cutoff frequency (fT) for the transistor and greater than 11.5 GHz intrinsic fT by de-embedding transistor extrinsic parasitics obtained through developed small-signal equivalent circuit model. Pass-transistor configuration measurements show less than 250ps of added delay and 15dB of isolation at 2.5GHz between programmed and erased states. Run-time reconfigurable operation of a 4-way routing switch is experimentally demonstrated with excellent selectivity and endurance greater than 1010 cycles. System level benchmarking of a M3D CIM accelerator employing IWO FeFET RS and weights performed on real-word DNN models shows 2.5x improvement in energy efficiency and >10% gain in area efficiency compared to 7nm SRAM design.","PeriodicalId":332454,"journal":{"name":"2022 IEEE Symposium on VLSI Technology and Circuits (VLSI Technology and Circuits)","volume":null,"pages":null},"PeriodicalIF":0.0000,"publicationDate":"2022-06-12","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"1","resultStr":"{\"title\":\"BEOL Compatible Ferroelectric Routers for Run-time Reconfigurable Compute-in-Memory Accelerators\",\"authors\":\"A. Khanna, H. Ye, Y. Luo, G. Bajpai, M. Jose, W. Chakraborty, Shimeng Yu, P. Fay, S. Datta\",\"doi\":\"10.1109/vlsitechnologyandcir46769.2022.9830498\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"Compute-in-memory (CIM) accelerators based on run-time reconfigurable designs have shown great promise in speeding up deep neural network (DNN) inferencing. Here, we present back-end-of-the-line (BEOL) compatible Indium Tungsten Oxide channel ferroelectric transistors (IWO FeFET) as signal routing switches (RS) for monolithic 3D (M3D) CIM accelerator. We demonstrate 2.45 GHz measured cutoff frequency (fT) for the transistor and greater than 11.5 GHz intrinsic fT by de-embedding transistor extrinsic parasitics obtained through developed small-signal equivalent circuit model. Pass-transistor configuration measurements show less than 250ps of added delay and 15dB of isolation at 2.5GHz between programmed and erased states. Run-time reconfigurable operation of a 4-way routing switch is experimentally demonstrated with excellent selectivity and endurance greater than 1010 cycles. System level benchmarking of a M3D CIM accelerator employing IWO FeFET RS and weights performed on real-word DNN models shows 2.5x improvement in energy efficiency and >10% gain in area efficiency compared to 7nm SRAM design.\",\"PeriodicalId\":332454,\"journal\":{\"name\":\"2022 IEEE Symposium on VLSI Technology and Circuits (VLSI Technology and Circuits)\",\"volume\":null,\"pages\":null},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2022-06-12\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"1\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2022 IEEE Symposium on VLSI Technology and Circuits (VLSI Technology and Circuits)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/vlsitechnologyandcir46769.2022.9830498\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2022 IEEE Symposium on VLSI Technology and Circuits (VLSI Technology and Circuits)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/vlsitechnologyandcir46769.2022.9830498","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
BEOL Compatible Ferroelectric Routers for Run-time Reconfigurable Compute-in-Memory Accelerators
Compute-in-memory (CIM) accelerators based on run-time reconfigurable designs have shown great promise in speeding up deep neural network (DNN) inferencing. Here, we present back-end-of-the-line (BEOL) compatible Indium Tungsten Oxide channel ferroelectric transistors (IWO FeFET) as signal routing switches (RS) for monolithic 3D (M3D) CIM accelerator. We demonstrate 2.45 GHz measured cutoff frequency (fT) for the transistor and greater than 11.5 GHz intrinsic fT by de-embedding transistor extrinsic parasitics obtained through developed small-signal equivalent circuit model. Pass-transistor configuration measurements show less than 250ps of added delay and 15dB of isolation at 2.5GHz between programmed and erased states. Run-time reconfigurable operation of a 4-way routing switch is experimentally demonstrated with excellent selectivity and endurance greater than 1010 cycles. System level benchmarking of a M3D CIM accelerator employing IWO FeFET RS and weights performed on real-word DNN models shows 2.5x improvement in energy efficiency and >10% gain in area efficiency compared to 7nm SRAM design.