J. G. García-Sánchez, D. Calderón-Preciado, F. Sandoval-Ibarra, J. M. Rosa
{"title":"四阶LP ΣΔ调制器的行为建模——迈向混合方案的设计","authors":"J. G. García-Sánchez, D. Calderón-Preciado, F. Sandoval-Ibarra, J. M. Rosa","doi":"10.1109/LASCAS.2014.6820297","DOIUrl":null,"url":null,"abstract":"Hybrid ΣΔ modulator has the property of take advantage of the capabilities of CT and DT architectures and is thus very effective in the cascade approach. In this paper, we show the behavioral simulation of ΣΔ modulators in SIMSIDES. A set of experiments based on models for analyzing the overall performance of SC ΣΔ modulators were used in order to translate design considerations into a set of values such that the design at transistor level be established by the desired performance of the proposed architecture. This design methodology is not the most accurate but it allows the designer to get a general comprehension of the system under design, a comprehension at the highest level of abstraction. The system under study is a cascade 4th order hybrid ΣΔ modulator, from which the second stage is a 2nd order Low-Pass (LP) DT ΣΔ modulator. The ideal behavioral performance of the DT modulator is used as vehicle to show how non-idealities must be taken into account, and also how to translate design considerations into a set of physical values for designing building blocks at transistor level.","PeriodicalId":235336,"journal":{"name":"2014 IEEE 5th Latin American Symposium on Circuits and Systems","volume":null,"pages":null},"PeriodicalIF":0.0000,"publicationDate":"2014-05-26","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"5","resultStr":"{\"title\":\"Behavioral modelling of a 4th order LP ΣΔ modulator-towards the design of a hybrid proposal\",\"authors\":\"J. G. García-Sánchez, D. Calderón-Preciado, F. Sandoval-Ibarra, J. M. Rosa\",\"doi\":\"10.1109/LASCAS.2014.6820297\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"Hybrid ΣΔ modulator has the property of take advantage of the capabilities of CT and DT architectures and is thus very effective in the cascade approach. In this paper, we show the behavioral simulation of ΣΔ modulators in SIMSIDES. A set of experiments based on models for analyzing the overall performance of SC ΣΔ modulators were used in order to translate design considerations into a set of values such that the design at transistor level be established by the desired performance of the proposed architecture. This design methodology is not the most accurate but it allows the designer to get a general comprehension of the system under design, a comprehension at the highest level of abstraction. The system under study is a cascade 4th order hybrid ΣΔ modulator, from which the second stage is a 2nd order Low-Pass (LP) DT ΣΔ modulator. The ideal behavioral performance of the DT modulator is used as vehicle to show how non-idealities must be taken into account, and also how to translate design considerations into a set of physical values for designing building blocks at transistor level.\",\"PeriodicalId\":235336,\"journal\":{\"name\":\"2014 IEEE 5th Latin American Symposium on Circuits and Systems\",\"volume\":null,\"pages\":null},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2014-05-26\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"5\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2014 IEEE 5th Latin American Symposium on Circuits and Systems\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/LASCAS.2014.6820297\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2014 IEEE 5th Latin American Symposium on Circuits and Systems","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/LASCAS.2014.6820297","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
Behavioral modelling of a 4th order LP ΣΔ modulator-towards the design of a hybrid proposal
Hybrid ΣΔ modulator has the property of take advantage of the capabilities of CT and DT architectures and is thus very effective in the cascade approach. In this paper, we show the behavioral simulation of ΣΔ modulators in SIMSIDES. A set of experiments based on models for analyzing the overall performance of SC ΣΔ modulators were used in order to translate design considerations into a set of values such that the design at transistor level be established by the desired performance of the proposed architecture. This design methodology is not the most accurate but it allows the designer to get a general comprehension of the system under design, a comprehension at the highest level of abstraction. The system under study is a cascade 4th order hybrid ΣΔ modulator, from which the second stage is a 2nd order Low-Pass (LP) DT ΣΔ modulator. The ideal behavioral performance of the DT modulator is used as vehicle to show how non-idealities must be taken into account, and also how to translate design considerations into a set of physical values for designing building blocks at transistor level.