{"title":"用于高速CMOS流水线adc的单级和两级ota","authors":"Tero Nieminen, K. Halonen","doi":"10.1109/ECCTD.2011.6043818","DOIUrl":null,"url":null,"abstract":"This paper compares one- and two stage operational transconductance amplifiers (OTAs) to be used in an 8-bit high speed (440-MS/s) deep submicron CMOS (130nm) low voltage (1.2V) pipelined Analogue to Digital Converter (ADC) based on an 1.5-bit double sampling Multiplying Digital to Analogue Converter (MDAC). The main emphasis is put on the OTA DC-gain, gain-bandwidth (GBW), differential linear output range VOPP and power consumption. Most basic OTAs are compared through the calculations and simulations. In the potential topologies (regulated single stage or two stage), single stage OTA has a better phase response and a lower power consumption, whereas two stage OTA achieves larger linear range.","PeriodicalId":126960,"journal":{"name":"2011 20th European Conference on Circuit Theory and Design (ECCTD)","volume":"57 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2011-10-13","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"7","resultStr":"{\"title\":\"Single and two-stage OTAs for high-speed CMOS pipelined ADCs\",\"authors\":\"Tero Nieminen, K. Halonen\",\"doi\":\"10.1109/ECCTD.2011.6043818\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"This paper compares one- and two stage operational transconductance amplifiers (OTAs) to be used in an 8-bit high speed (440-MS/s) deep submicron CMOS (130nm) low voltage (1.2V) pipelined Analogue to Digital Converter (ADC) based on an 1.5-bit double sampling Multiplying Digital to Analogue Converter (MDAC). The main emphasis is put on the OTA DC-gain, gain-bandwidth (GBW), differential linear output range VOPP and power consumption. Most basic OTAs are compared through the calculations and simulations. In the potential topologies (regulated single stage or two stage), single stage OTA has a better phase response and a lower power consumption, whereas two stage OTA achieves larger linear range.\",\"PeriodicalId\":126960,\"journal\":{\"name\":\"2011 20th European Conference on Circuit Theory and Design (ECCTD)\",\"volume\":\"57 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2011-10-13\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"7\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2011 20th European Conference on Circuit Theory and Design (ECCTD)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/ECCTD.2011.6043818\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2011 20th European Conference on Circuit Theory and Design (ECCTD)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ECCTD.2011.6043818","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
Single and two-stage OTAs for high-speed CMOS pipelined ADCs
This paper compares one- and two stage operational transconductance amplifiers (OTAs) to be used in an 8-bit high speed (440-MS/s) deep submicron CMOS (130nm) low voltage (1.2V) pipelined Analogue to Digital Converter (ADC) based on an 1.5-bit double sampling Multiplying Digital to Analogue Converter (MDAC). The main emphasis is put on the OTA DC-gain, gain-bandwidth (GBW), differential linear output range VOPP and power consumption. Most basic OTAs are compared through the calculations and simulations. In the potential topologies (regulated single stage or two stage), single stage OTA has a better phase response and a lower power consumption, whereas two stage OTA achieves larger linear range.