D. Redmond, M. Fitzgibbon, A. Bannon, D. Hobbs, Chunhe Zhao, K. Kase, J. Chan, M. Priel, K. Traylor, K. Tilley
{"title":"GSM/GPRS混合信号基带集成电路","authors":"D. Redmond, M. Fitzgibbon, A. Bannon, D. Hobbs, Chunhe Zhao, K. Kase, J. Chan, M. Priel, K. Traylor, K. Tilley","doi":"10.1109/ISSCC.2002.992101","DOIUrl":null,"url":null,"abstract":"A dual-core baseband processor IC for GSM/GPRS cellular phone applications is built in a 0.13 /spl mu/m CMOS process with 5 levels of copper interconnect and contains a high level of mixed-signal integration which includes: 1 GHz CMOS synthesizer, 10 b general-purpose ADC, two 14 b ADCs, power amplifier controller, and 13 b voice codec.","PeriodicalId":423674,"journal":{"name":"2002 IEEE International Solid-State Circuits Conference. Digest of Technical Papers (Cat. No.02CH37315)","volume":"62 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2002-08-07","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"10","resultStr":"{\"title\":\"A GSM/GPRS mixed-signal baseband IC\",\"authors\":\"D. Redmond, M. Fitzgibbon, A. Bannon, D. Hobbs, Chunhe Zhao, K. Kase, J. Chan, M. Priel, K. Traylor, K. Tilley\",\"doi\":\"10.1109/ISSCC.2002.992101\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"A dual-core baseband processor IC for GSM/GPRS cellular phone applications is built in a 0.13 /spl mu/m CMOS process with 5 levels of copper interconnect and contains a high level of mixed-signal integration which includes: 1 GHz CMOS synthesizer, 10 b general-purpose ADC, two 14 b ADCs, power amplifier controller, and 13 b voice codec.\",\"PeriodicalId\":423674,\"journal\":{\"name\":\"2002 IEEE International Solid-State Circuits Conference. Digest of Technical Papers (Cat. No.02CH37315)\",\"volume\":\"62 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2002-08-07\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"10\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2002 IEEE International Solid-State Circuits Conference. Digest of Technical Papers (Cat. No.02CH37315)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/ISSCC.2002.992101\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2002 IEEE International Solid-State Circuits Conference. Digest of Technical Papers (Cat. No.02CH37315)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ISSCC.2002.992101","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 10
摘要
用于GSM/GPRS蜂窝电话应用的双核基带处理器IC采用0.13 /spl mu/m CMOS工艺,5级铜互连,包含高水平的混合信号集成,包括:1 GHz CMOS合成器,10 b通用ADC,两个14 b ADC,功率放大器控制器和13 b语音编解码器。
A dual-core baseband processor IC for GSM/GPRS cellular phone applications is built in a 0.13 /spl mu/m CMOS process with 5 levels of copper interconnect and contains a high level of mixed-signal integration which includes: 1 GHz CMOS synthesizer, 10 b general-purpose ADC, two 14 b ADCs, power amplifier controller, and 13 b voice codec.