M. Murakawa, T. Adachi, Yoshihiro Niino, Y. Kasai, E. Takahashi, K. Takasuka, T. Higuchi
{"title":"人工智能校准的中频滤波器:一种面积和功耗降低的良率提高方法","authors":"M. Murakawa, T. Adachi, Yoshihiro Niino, Y. Kasai, E. Takahashi, K. Takasuka, T. Higuchi","doi":"10.1109/CICC.2002.1012837","DOIUrl":null,"url":null,"abstract":"We have developed an LSI for Gm-C IF filters, attaining (1) a 63% reduction in filter area, (2) a 38% reduction in power dissipation, compared to existing commercial products, and (3) a yield rate of 97%. The developed chip is calibrated within a few seconds by a genetic algorithm; an efficient AI technique for difficult optimization problems.","PeriodicalId":209025,"journal":{"name":"Proceedings of the IEEE 2002 Custom Integrated Circuits Conference (Cat. No.02CH37285)","volume":"1 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2002-08-07","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"21","resultStr":"{\"title\":\"An AI-calibrated IF filter: a yield enhancement method with area and power dissipation reductions\",\"authors\":\"M. Murakawa, T. Adachi, Yoshihiro Niino, Y. Kasai, E. Takahashi, K. Takasuka, T. Higuchi\",\"doi\":\"10.1109/CICC.2002.1012837\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"We have developed an LSI for Gm-C IF filters, attaining (1) a 63% reduction in filter area, (2) a 38% reduction in power dissipation, compared to existing commercial products, and (3) a yield rate of 97%. The developed chip is calibrated within a few seconds by a genetic algorithm; an efficient AI technique for difficult optimization problems.\",\"PeriodicalId\":209025,\"journal\":{\"name\":\"Proceedings of the IEEE 2002 Custom Integrated Circuits Conference (Cat. No.02CH37285)\",\"volume\":\"1 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2002-08-07\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"21\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"Proceedings of the IEEE 2002 Custom Integrated Circuits Conference (Cat. No.02CH37285)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/CICC.2002.1012837\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"Proceedings of the IEEE 2002 Custom Integrated Circuits Conference (Cat. No.02CH37285)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/CICC.2002.1012837","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
An AI-calibrated IF filter: a yield enhancement method with area and power dissipation reductions
We have developed an LSI for Gm-C IF filters, attaining (1) a 63% reduction in filter area, (2) a 38% reduction in power dissipation, compared to existing commercial products, and (3) a yield rate of 97%. The developed chip is calibrated within a few seconds by a genetic algorithm; an efficient AI technique for difficult optimization problems.