ESD稳健800V SCR-JFET, p+镇流器结构

2016 38th Electrical Overstress/Electrostatic Discharge Symposium (EOS/ESD) Pub Date : 2016-09-01 DOI:10.1109/EOSESD.2016.7592524

S. Fujiwara, R. Burton

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引用次数: 3

摘要

对包含可控硅结构的800V JFET进行了ESD鲁棒性增强研究。在器件中引入了p+镇流器结构，并通过三维TCAD仿真验证了其ESD稳健性的提高。基于TCAD的研究结果，制作了一个有碴器件，并成功地提高了ESD性能。

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ESD robust 800V SCR-JFET with p+ ballast structure

ESD robustness enhancement study of an 800V JFET including the SCR structure is conducted. A p+ ballast structure is introduced in the device and ESD robustness improvement is demonstrated with 3D TCAD simulations. Based on the TCAD study results, a ballasted device is fabricated and improved ESD performance is successfully obtained.

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2016 38th Electrical Overstress/Electrostatic Discharge Symposium (EOS/ESD)

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