{"title":"表征衬底噪声对高速闪存adc的影响","authors":"P. Nikaeen, B. Murmann, R. Dutton","doi":"10.1109/ISQED.2008.141","DOIUrl":null,"url":null,"abstract":"A 4-bit flash ADC is investigated in presence of substrate noise generated by switching activities in digital blocks. The impact of noise is analyzed in different building blocks of the ADC and is measured experimentally using a high-speed ADC test block fabricated in a 0.18-mum SiGe BiCMOS process. Measurement results show that noise spikes in the substrate cause distortion in the prototype ADC and degrade its SNDR by 2 dB (10%) at noise frequencies above 200 MHz.","PeriodicalId":243121,"journal":{"name":"9th International Symposium on Quality Electronic Design (isqed 2008)","volume":"27 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2008-03-17","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"3","resultStr":"{\"title\":\"Characterizing the Impact of Substrate Noise on High-Speed Flash ADCs\",\"authors\":\"P. Nikaeen, B. Murmann, R. Dutton\",\"doi\":\"10.1109/ISQED.2008.141\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"A 4-bit flash ADC is investigated in presence of substrate noise generated by switching activities in digital blocks. The impact of noise is analyzed in different building blocks of the ADC and is measured experimentally using a high-speed ADC test block fabricated in a 0.18-mum SiGe BiCMOS process. Measurement results show that noise spikes in the substrate cause distortion in the prototype ADC and degrade its SNDR by 2 dB (10%) at noise frequencies above 200 MHz.\",\"PeriodicalId\":243121,\"journal\":{\"name\":\"9th International Symposium on Quality Electronic Design (isqed 2008)\",\"volume\":\"27 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2008-03-17\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"3\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"9th International Symposium on Quality Electronic Design (isqed 2008)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/ISQED.2008.141\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"9th International Symposium on Quality Electronic Design (isqed 2008)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ISQED.2008.141","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 3
摘要
研究了一个4位闪存ADC在数字块中开关活动所产生的衬底噪声的存在。在ADC的不同构建模块中分析了噪声的影响，并使用以0.18 μ m SiGe BiCMOS工艺制作的高速ADC测试模块进行了实验测量。测量结果表明，在噪声频率高于200 MHz时，衬底中的噪声尖峰会导致原型ADC失真，使其SNDR降低2 dB(10%)。
Characterizing the Impact of Substrate Noise on High-Speed Flash ADCs
A 4-bit flash ADC is investigated in presence of substrate noise generated by switching activities in digital blocks. The impact of noise is analyzed in different building blocks of the ADC and is measured experimentally using a high-speed ADC test block fabricated in a 0.18-mum SiGe BiCMOS process. Measurement results show that noise spikes in the substrate cause distortion in the prototype ADC and degrade its SNDR by 2 dB (10%) at noise frequencies above 200 MHz.
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