{"title":"应用优化自适应ECC与先进ldpc解决可靠性,性能和成本之间的权衡固态驱动器","authors":"Y. Yamaga, C. Matsui, Shogo Hachiya, K. Takeuchi","doi":"10.1109/IMW.2016.7493568","DOIUrl":null,"url":null,"abstract":"The performance of NAND flash based solid-state drives (SSDs) is highly dependent on the application's read and write characteristics [3], where \"intensity\" is defined as ratio of read:write requests, and \"write- hot/cold\" considers the write frequency. Moreover, NAND flash memory's reliability degrades with write/erase (W/E) cycling. To optimize performance and reliability, conventional error-correcting code (ECC) scheme switches from fast conventional Bose-Chaudhuri- Hocquenghem (BCH) to slower conventional Low Density Parity Check (LDPC), when the page error rate exceeds BCH's decoding capability. However, advanced LDPCs have been reported, called Quick-LDPC [8] and Error- Prediction (EP-) LDPC without (w/o) upper/lower cells [8], which have (i) higher error correction capability compared to conventional BCH and (ii) shorter decoding time than conventional soft-decoding LDPC. Therefore, this paper proposes an application optimized adaptive (AOA-) ECC for Multi-Level-Cell (MLC) NAND flash-based enterprise SSDs. AOA-ECC includes a new algorithm to efficiently combine the two advanced LDPCs, considering the application's characteristics and memory's W/E cycles. A firmware in the proposed SSD system chooses the optimal advanced LDPC, based on whether the application is read/write-intensive and/or write- hot/cold. Using the proposed AOA-ECC SSD with MLC NAND flash, performance improves by up to 3-times, the reliability improves by 57% and the ECC decoder area decreases by 25%.","PeriodicalId":365759,"journal":{"name":"2016 IEEE 8th International Memory Workshop (IMW)","volume":"1 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2016-05-15","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"3","resultStr":"{\"title\":\"Application Optimized Adaptive ECC with Advanced LDPCs to Resolve Trade-Off among Reliability, Performance, and Cost of Solid-State Drives\",\"authors\":\"Y. Yamaga, C. Matsui, Shogo Hachiya, K. Takeuchi\",\"doi\":\"10.1109/IMW.2016.7493568\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"The performance of NAND flash based solid-state drives (SSDs) is highly dependent on the application's read and write characteristics [3], where \\\"intensity\\\" is defined as ratio of read:write requests, and \\\"write- hot/cold\\\" considers the write frequency. Moreover, NAND flash memory's reliability degrades with write/erase (W/E) cycling. To optimize performance and reliability, conventional error-correcting code (ECC) scheme switches from fast conventional Bose-Chaudhuri- Hocquenghem (BCH) to slower conventional Low Density Parity Check (LDPC), when the page error rate exceeds BCH's decoding capability. However, advanced LDPCs have been reported, called Quick-LDPC [8] and Error- Prediction (EP-) LDPC without (w/o) upper/lower cells [8], which have (i) higher error correction capability compared to conventional BCH and (ii) shorter decoding time than conventional soft-decoding LDPC. Therefore, this paper proposes an application optimized adaptive (AOA-) ECC for Multi-Level-Cell (MLC) NAND flash-based enterprise SSDs. AOA-ECC includes a new algorithm to efficiently combine the two advanced LDPCs, considering the application's characteristics and memory's W/E cycles. A firmware in the proposed SSD system chooses the optimal advanced LDPC, based on whether the application is read/write-intensive and/or write- hot/cold. Using the proposed AOA-ECC SSD with MLC NAND flash, performance improves by up to 3-times, the reliability improves by 57% and the ECC decoder area decreases by 25%.\",\"PeriodicalId\":365759,\"journal\":{\"name\":\"2016 IEEE 8th International Memory Workshop (IMW)\",\"volume\":\"1 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2016-05-15\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"3\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2016 IEEE 8th International Memory Workshop (IMW)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/IMW.2016.7493568\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2016 IEEE 8th International Memory Workshop (IMW)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/IMW.2016.7493568","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
Application Optimized Adaptive ECC with Advanced LDPCs to Resolve Trade-Off among Reliability, Performance, and Cost of Solid-State Drives
The performance of NAND flash based solid-state drives (SSDs) is highly dependent on the application's read and write characteristics [3], where "intensity" is defined as ratio of read:write requests, and "write- hot/cold" considers the write frequency. Moreover, NAND flash memory's reliability degrades with write/erase (W/E) cycling. To optimize performance and reliability, conventional error-correcting code (ECC) scheme switches from fast conventional Bose-Chaudhuri- Hocquenghem (BCH) to slower conventional Low Density Parity Check (LDPC), when the page error rate exceeds BCH's decoding capability. However, advanced LDPCs have been reported, called Quick-LDPC [8] and Error- Prediction (EP-) LDPC without (w/o) upper/lower cells [8], which have (i) higher error correction capability compared to conventional BCH and (ii) shorter decoding time than conventional soft-decoding LDPC. Therefore, this paper proposes an application optimized adaptive (AOA-) ECC for Multi-Level-Cell (MLC) NAND flash-based enterprise SSDs. AOA-ECC includes a new algorithm to efficiently combine the two advanced LDPCs, considering the application's characteristics and memory's W/E cycles. A firmware in the proposed SSD system chooses the optimal advanced LDPC, based on whether the application is read/write-intensive and/or write- hot/cold. Using the proposed AOA-ECC SSD with MLC NAND flash, performance improves by up to 3-times, the reliability improves by 57% and the ECC decoder area decreases by 25%.