{"title":"Mcm老化经验","authors":"T. Bardsley, J. Lisowski, S. Wilson, S. VanAernam","doi":"10.1109/ICMCM.1994.753555","DOIUrl":null,"url":null,"abstract":"Multi-chip module burn-in has been utilized at IBM for several years. The current module burn-in tool stresses 121 chip multi-chip modules used in the IBM ES/9000 mainframes. MCM level burn-in has been performed on alumina and glass-ceramic substrates with bipolar and CMOS chip technologies resulting in various challenges to tool design and proem development. This paper will focus on the module burn-in tool, key technical challenges to implementing MCM burn-in and the experience of performing MCM level burn-in. The key technical challenges: thermal management, thermal/mechanical stress issues, electrical stimulation and module testability will be reviewed. The impact of design for test on burn-in will be discussed. A review of the defect mechanisms and experimental results will be covered. An overview of a cost model which compares MCM level burn-in against known-good-die burn-in will be reviewed to demonstrate the merits of module level burn-in. The paper will conclude with the future plans to address the rapidly expanding OEM MCM market.","PeriodicalId":363745,"journal":{"name":"Proceedings of the International Conference on Multichip Modules","volume":"35 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"1994-04-13","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":"{\"title\":\"Mcm Burn-In Experience\",\"authors\":\"T. Bardsley, J. Lisowski, S. Wilson, S. VanAernam\",\"doi\":\"10.1109/ICMCM.1994.753555\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"Multi-chip module burn-in has been utilized at IBM for several years. The current module burn-in tool stresses 121 chip multi-chip modules used in the IBM ES/9000 mainframes. MCM level burn-in has been performed on alumina and glass-ceramic substrates with bipolar and CMOS chip technologies resulting in various challenges to tool design and proem development. This paper will focus on the module burn-in tool, key technical challenges to implementing MCM burn-in and the experience of performing MCM level burn-in. The key technical challenges: thermal management, thermal/mechanical stress issues, electrical stimulation and module testability will be reviewed. The impact of design for test on burn-in will be discussed. A review of the defect mechanisms and experimental results will be covered. An overview of a cost model which compares MCM level burn-in against known-good-die burn-in will be reviewed to demonstrate the merits of module level burn-in. The paper will conclude with the future plans to address the rapidly expanding OEM MCM market.\",\"PeriodicalId\":363745,\"journal\":{\"name\":\"Proceedings of the International Conference on Multichip Modules\",\"volume\":\"35 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"1994-04-13\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"0\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"Proceedings of the International Conference on Multichip Modules\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/ICMCM.1994.753555\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"Proceedings of the International Conference on Multichip Modules","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ICMCM.1994.753555","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
Multi-chip module burn-in has been utilized at IBM for several years. The current module burn-in tool stresses 121 chip multi-chip modules used in the IBM ES/9000 mainframes. MCM level burn-in has been performed on alumina and glass-ceramic substrates with bipolar and CMOS chip technologies resulting in various challenges to tool design and proem development. This paper will focus on the module burn-in tool, key technical challenges to implementing MCM burn-in and the experience of performing MCM level burn-in. The key technical challenges: thermal management, thermal/mechanical stress issues, electrical stimulation and module testability will be reviewed. The impact of design for test on burn-in will be discussed. A review of the defect mechanisms and experimental results will be covered. An overview of a cost model which compares MCM level burn-in against known-good-die burn-in will be reviewed to demonstrate the merits of module level burn-in. The paper will conclude with the future plans to address the rapidly expanding OEM MCM market.