Heegon Kim, Jonghyun Cho, Joohee Kim, Kiyeong Kim, Sumin Choi, Joungho Kim, J. Pak
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A compact on-interposer passive equalizer for chip-to-chip high-speed data transmission
In this paper, a new compact on-interposer passive equalizer was proposed for chip-to-chip high-speed data transmission on the silicon-based on-interposer channel. The proposed equalizer uses the parasitic resistance and inductance of the coil-shaped on-interposer shunt metal line structure to produce the high-pass filter for loss compensation. This results in wide-band channel equalization and low power-consumption. Moreover, the compact coil-shaped structure of the proposed equalizer allows for wide I/O and high adjustability. The remarkable performance of the proposed compact on-interposer passive equalizer is successfully demonstrated by a frequency-and time-domain simulation of up to 10 Gbps.