N. I. Shuhaimi, M. Mohamad, W. M. Jubadi, Ruzaini Tugiman, N. Zinal, Rosnah Mohd Zin
{"title":"宽度变化下硅PIN二极管I-V性能的比较","authors":"N. I. Shuhaimi, M. Mohamad, W. M. Jubadi, Ruzaini Tugiman, N. Zinal, Rosnah Mohd Zin","doi":"10.1109/SMELEC.2010.5549491","DOIUrl":null,"url":null,"abstract":"The performance of the PIN diode is very much depends on the chip geometry and the semiconductor material used, especially in the intrinsic region. The biasing voltage applied to the PIN diode determines the amount of holes and electrons injected into the intrinsic region and the values of its resistivity. This will give effect to the I-V performance of the PIN diode. This research studied the effects of width (and subsequently area) variations of intrinsic region of Silicon PIN diode on its I-V performance. The two dimensional structures and recipes of PIN diode are designed and simulated using Sentaurus TCAD tools. The thickness of PIN diode is kept at 40 µm while only the width is varied accordingly. Three variations of width have been chosen which are 90 µm, 80 µm, and 70 µm in order to study the impacts of width variation has on the I-V performance. Based on the simulation results, it is found that the current level is proportional to the PIN structure width.","PeriodicalId":308501,"journal":{"name":"2010 IEEE International Conference on Semiconductor Electronics (ICSE2010)","volume":"14 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2010-06-28","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"10","resultStr":"{\"title\":\"Comparison on I-V performances of Silicon PIN diode towards width variations\",\"authors\":\"N. I. Shuhaimi, M. Mohamad, W. M. Jubadi, Ruzaini Tugiman, N. Zinal, Rosnah Mohd Zin\",\"doi\":\"10.1109/SMELEC.2010.5549491\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"The performance of the PIN diode is very much depends on the chip geometry and the semiconductor material used, especially in the intrinsic region. The biasing voltage applied to the PIN diode determines the amount of holes and electrons injected into the intrinsic region and the values of its resistivity. This will give effect to the I-V performance of the PIN diode. This research studied the effects of width (and subsequently area) variations of intrinsic region of Silicon PIN diode on its I-V performance. The two dimensional structures and recipes of PIN diode are designed and simulated using Sentaurus TCAD tools. The thickness of PIN diode is kept at 40 µm while only the width is varied accordingly. Three variations of width have been chosen which are 90 µm, 80 µm, and 70 µm in order to study the impacts of width variation has on the I-V performance. Based on the simulation results, it is found that the current level is proportional to the PIN structure width.\",\"PeriodicalId\":308501,\"journal\":{\"name\":\"2010 IEEE International Conference on Semiconductor Electronics (ICSE2010)\",\"volume\":\"14 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2010-06-28\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"10\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2010 IEEE International Conference on Semiconductor Electronics (ICSE2010)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/SMELEC.2010.5549491\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2010 IEEE International Conference on Semiconductor Electronics (ICSE2010)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/SMELEC.2010.5549491","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
Comparison on I-V performances of Silicon PIN diode towards width variations
The performance of the PIN diode is very much depends on the chip geometry and the semiconductor material used, especially in the intrinsic region. The biasing voltage applied to the PIN diode determines the amount of holes and electrons injected into the intrinsic region and the values of its resistivity. This will give effect to the I-V performance of the PIN diode. This research studied the effects of width (and subsequently area) variations of intrinsic region of Silicon PIN diode on its I-V performance. The two dimensional structures and recipes of PIN diode are designed and simulated using Sentaurus TCAD tools. The thickness of PIN diode is kept at 40 µm while only the width is varied accordingly. Three variations of width have been chosen which are 90 µm, 80 µm, and 70 µm in order to study the impacts of width variation has on the I-V performance. Based on the simulation results, it is found that the current level is proportional to the PIN structure width.