{"title":"类spice环境中损耗和色散互连的频域和时域随机分析","authors":"Paolo Manfredi, D. Ginste, D. Zutter, F. Canavero","doi":"10.1109/EPEPS.2012.6457844","DOIUrl":null,"url":null,"abstract":"This paper presents an improvement of the state-of-the-art polynomial chaos (PC) modeling of high-speed interconnects with parameter uncertainties via SPICE-like tools. While the previous model, due to its mathematical formulation, was limited to lossless lines, the introduction of modified classes of polynomials yields a formulation that allows to account for lossess and dispersion as well. Thanks to this, the new implementation can also take full advantage of the combination of the PC technique with macromodels that accurately describe the interconnect properties. An application example, i.e. the stochastic analysis of an on-chip line, validates and demonstrates the improved method.","PeriodicalId":188377,"journal":{"name":"2012 IEEE 21st Conference on Electrical Performance of Electronic Packaging and Systems","volume":"6 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2012-10-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"1","resultStr":"{\"title\":\"Frequency- and time-domain stochastic analysis of lossy and dispersive interconnects in a SPICE-like environment\",\"authors\":\"Paolo Manfredi, D. Ginste, D. Zutter, F. Canavero\",\"doi\":\"10.1109/EPEPS.2012.6457844\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"This paper presents an improvement of the state-of-the-art polynomial chaos (PC) modeling of high-speed interconnects with parameter uncertainties via SPICE-like tools. While the previous model, due to its mathematical formulation, was limited to lossless lines, the introduction of modified classes of polynomials yields a formulation that allows to account for lossess and dispersion as well. Thanks to this, the new implementation can also take full advantage of the combination of the PC technique with macromodels that accurately describe the interconnect properties. An application example, i.e. the stochastic analysis of an on-chip line, validates and demonstrates the improved method.\",\"PeriodicalId\":188377,\"journal\":{\"name\":\"2012 IEEE 21st Conference on Electrical Performance of Electronic Packaging and Systems\",\"volume\":\"6 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2012-10-01\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"1\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2012 IEEE 21st Conference on Electrical Performance of Electronic Packaging and Systems\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/EPEPS.2012.6457844\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2012 IEEE 21st Conference on Electrical Performance of Electronic Packaging and Systems","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/EPEPS.2012.6457844","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
Frequency- and time-domain stochastic analysis of lossy and dispersive interconnects in a SPICE-like environment
This paper presents an improvement of the state-of-the-art polynomial chaos (PC) modeling of high-speed interconnects with parameter uncertainties via SPICE-like tools. While the previous model, due to its mathematical formulation, was limited to lossless lines, the introduction of modified classes of polynomials yields a formulation that allows to account for lossess and dispersion as well. Thanks to this, the new implementation can also take full advantage of the combination of the PC technique with macromodels that accurately describe the interconnect properties. An application example, i.e. the stochastic analysis of an on-chip line, validates and demonstrates the improved method.