薄膜多芯片模组衬底无磁倒装键合的发展

R. Bonda, T. Fang, B. Hileman, D. Spigler, J. Stafford, G. Swan, G. Tam
{"title":"薄膜多芯片模组衬底无磁倒装键合的发展","authors":"R. Bonda, T. Fang, B. Hileman, D. Spigler, J. Stafford, G. Swan, G. Tam","doi":"10.1109/ECTC.1997.606272","DOIUrl":null,"url":null,"abstract":"Motorola SPS has developed an assembly process for a three-chip multichip module using a fluxless bonding technique. The substrate is a 25 mm/spl times/25 mm glass that containing two layers of electroplated metallization with vias connecting the two layers and dielectric layer separating them. A test substrate is designed to characterize the continuity and leakage of the assembled modules. One of the chips has two staggered rows of 384 total bumps on the periphery with 80 /spl mu/m pitch and 45 /spl mu/m bump size. The other two chips have three staggered rows, 222 bumps on each chip, 210 /spl mu/m pitch and 100 /spl mu/m bump size. The bump composition is Pb-Sn with low Sn content. All three chips are bonded to the substrate using a fluxless plasma process followed by reflow in a nitrogen furnace. A high precision robot is used for placement and tacking of the chips on the substrate. After the bonding, the chips are underfilled with a proprietary underfill epoxy, and tested for reliability. All the reliability criteria for the specific application of this module have been met. Physical design and assembly process of this multichip module will be presented.","PeriodicalId":339633,"journal":{"name":"1997 Proceedings 47th Electronic Components and Technology Conference","volume":"53 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"1997-05-18","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"2","resultStr":"{\"title\":\"Development of fluxless flip chip bonding to a thin film multichip module substrate\",\"authors\":\"R. Bonda, T. Fang, B. Hileman, D. Spigler, J. Stafford, G. Swan, G. Tam\",\"doi\":\"10.1109/ECTC.1997.606272\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"Motorola SPS has developed an assembly process for a three-chip multichip module using a fluxless bonding technique. The substrate is a 25 mm/spl times/25 mm glass that containing two layers of electroplated metallization with vias connecting the two layers and dielectric layer separating them. A test substrate is designed to characterize the continuity and leakage of the assembled modules. One of the chips has two staggered rows of 384 total bumps on the periphery with 80 /spl mu/m pitch and 45 /spl mu/m bump size. The other two chips have three staggered rows, 222 bumps on each chip, 210 /spl mu/m pitch and 100 /spl mu/m bump size. The bump composition is Pb-Sn with low Sn content. All three chips are bonded to the substrate using a fluxless plasma process followed by reflow in a nitrogen furnace. A high precision robot is used for placement and tacking of the chips on the substrate. After the bonding, the chips are underfilled with a proprietary underfill epoxy, and tested for reliability. All the reliability criteria for the specific application of this module have been met. Physical design and assembly process of this multichip module will be presented.\",\"PeriodicalId\":339633,\"journal\":{\"name\":\"1997 Proceedings 47th Electronic Components and Technology Conference\",\"volume\":\"53 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"1997-05-18\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"2\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"1997 Proceedings 47th Electronic Components and Technology Conference\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/ECTC.1997.606272\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"1997 Proceedings 47th Electronic Components and Technology Conference","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ECTC.1997.606272","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 2

摘要

摩托罗拉SPS开发了一种使用无焊剂粘合技术的三芯片多芯片模块组装工艺。基板是25mm /spl × / 25mm的玻璃,包含两层电镀金属化,通过过孔将两层连接起来,并将它们分开。设计了一个测试基板来表征组装模块的连续性和泄漏性。其中一个芯片在外围有两排交错的384个凸起,间距为80 /spl μ m,凸起大小为45 /spl μ m。另外两个芯片有三列交错排列,每个芯片上有222个凸起,间距为210 /spl亩/米,凸起大小为100 /spl亩/米。凸起成分为Pb-Sn, Sn含量较低。所有三个芯片都是用无熔剂等离子体工艺结合到衬底上,然后在氮气炉中回流。高精度机器人用于在基板上放置和固定芯片。粘合后,芯片用专有的环氧底料填充,并测试可靠性。满足了该模块具体应用的所有可靠性标准。介绍了该多芯片模块的物理设计和组装过程。
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Development of fluxless flip chip bonding to a thin film multichip module substrate
Motorola SPS has developed an assembly process for a three-chip multichip module using a fluxless bonding technique. The substrate is a 25 mm/spl times/25 mm glass that containing two layers of electroplated metallization with vias connecting the two layers and dielectric layer separating them. A test substrate is designed to characterize the continuity and leakage of the assembled modules. One of the chips has two staggered rows of 384 total bumps on the periphery with 80 /spl mu/m pitch and 45 /spl mu/m bump size. The other two chips have three staggered rows, 222 bumps on each chip, 210 /spl mu/m pitch and 100 /spl mu/m bump size. The bump composition is Pb-Sn with low Sn content. All three chips are bonded to the substrate using a fluxless plasma process followed by reflow in a nitrogen furnace. A high precision robot is used for placement and tacking of the chips on the substrate. After the bonding, the chips are underfilled with a proprietary underfill epoxy, and tested for reliability. All the reliability criteria for the specific application of this module have been met. Physical design and assembly process of this multichip module will be presented.
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