高密度重分布层微通孔可靠性建模

Pratik Nimbalkar, M. Kathaperumal, Fuhan Liu, M. Swaminathan, R. Tummala
{"title":"高密度重分布层微通孔可靠性建模","authors":"Pratik Nimbalkar, M. Kathaperumal, Fuhan Liu, M. Swaminathan, R. Tummala","doi":"10.1109/ECTC32696.2021.00161","DOIUrl":null,"url":null,"abstract":"The ever-increasing demand for high-bandwidth interconnects has given rise to the need for high IO-density package redistribution layers (RDL). This necessitates scaling down RDL critical dimensions as well as microvias. There are numerous challenges pertaining to scaling down microvias below $5\\ \\mu \\mathrm{m}$ diameter. The main challenge is the thermomechanical reliability of vias in polymer dielectrics. Modeling and design for reliability in various polymer dielectrics is the key to achieve mechanical reliability. This paper presents a model for the prediction of micro-via failure. The effects of via geometry such as-via angle and height as well as material properties such as-CTE and elastic modulus on via failure are presented. Furthermore, modeling results are correlated with experimental results to verify the accuracy of the model. Using this model, it was determined that the conventional via geometry reaches an engineering limit at $2 \\mu \\mathrm{m}$ of via diameter. Below this size, it becomes difficult to achieve reliable vias in polymers as they do not survive 1000 thermal cycles. Based on the modeling studies, a novel method is proposed for enhancement of reliability of vias below the engineering limit of $2\\ \\mu \\mathrm{m}$.","PeriodicalId":351817,"journal":{"name":"2021 IEEE 71st Electronic Components and Technology Conference (ECTC)","volume":null,"pages":null},"PeriodicalIF":0.0000,"publicationDate":"2021-06-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"3","resultStr":"{\"title\":\"Reliability Modeling of Micro-vias in High-Density Redistribution Layers\",\"authors\":\"Pratik Nimbalkar, M. Kathaperumal, Fuhan Liu, M. Swaminathan, R. Tummala\",\"doi\":\"10.1109/ECTC32696.2021.00161\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"The ever-increasing demand for high-bandwidth interconnects has given rise to the need for high IO-density package redistribution layers (RDL). This necessitates scaling down RDL critical dimensions as well as microvias. There are numerous challenges pertaining to scaling down microvias below $5\\\\ \\\\mu \\\\mathrm{m}$ diameter. The main challenge is the thermomechanical reliability of vias in polymer dielectrics. Modeling and design for reliability in various polymer dielectrics is the key to achieve mechanical reliability. This paper presents a model for the prediction of micro-via failure. The effects of via geometry such as-via angle and height as well as material properties such as-CTE and elastic modulus on via failure are presented. Furthermore, modeling results are correlated with experimental results to verify the accuracy of the model. Using this model, it was determined that the conventional via geometry reaches an engineering limit at $2 \\\\mu \\\\mathrm{m}$ of via diameter. Below this size, it becomes difficult to achieve reliable vias in polymers as they do not survive 1000 thermal cycles. Based on the modeling studies, a novel method is proposed for enhancement of reliability of vias below the engineering limit of $2\\\\ \\\\mu \\\\mathrm{m}$.\",\"PeriodicalId\":351817,\"journal\":{\"name\":\"2021 IEEE 71st Electronic Components and Technology Conference (ECTC)\",\"volume\":null,\"pages\":null},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2021-06-01\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"3\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2021 IEEE 71st Electronic Components and Technology Conference (ECTC)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/ECTC32696.2021.00161\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2021 IEEE 71st Electronic Components and Technology Conference (ECTC)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ECTC32696.2021.00161","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 3

摘要

随着对高带宽互连需求的不断增长,对高io密度封装再分配层(RDL)的需求也随之增加。这就需要缩小RDL的关键尺寸以及微通孔。将微通孔缩小到5\ \mu \math {m}$直径以下存在许多挑战。主要的挑战是聚合物电介质中过孔的热机械可靠性。各种聚合物电介质的可靠性建模和设计是实现机械可靠性的关键。本文提出了一种微通孔失效预测模型。讨论了孔口几何形状(孔口角度和高度)以及材料性能(cte和弹性模量)对孔口破坏的影响。并将建模结果与实验结果进行了对比,验证了模型的准确性。利用该模型,确定了传统的通孔几何形状在通孔直径$2 \mu \ mathm {m}$处达到工程极限。在这个尺寸以下,很难在聚合物中实现可靠的过孔,因为它们不能经受1000次热循环。在建模研究的基础上,提出了一种提高过孔可靠性的新方法,该方法低于工程极限$2\ \mu \ mathm {m}$。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
查看原文
分享 分享
微信好友 朋友圈 QQ好友 复制链接
本刊更多论文
Reliability Modeling of Micro-vias in High-Density Redistribution Layers
The ever-increasing demand for high-bandwidth interconnects has given rise to the need for high IO-density package redistribution layers (RDL). This necessitates scaling down RDL critical dimensions as well as microvias. There are numerous challenges pertaining to scaling down microvias below $5\ \mu \mathrm{m}$ diameter. The main challenge is the thermomechanical reliability of vias in polymer dielectrics. Modeling and design for reliability in various polymer dielectrics is the key to achieve mechanical reliability. This paper presents a model for the prediction of micro-via failure. The effects of via geometry such as-via angle and height as well as material properties such as-CTE and elastic modulus on via failure are presented. Furthermore, modeling results are correlated with experimental results to verify the accuracy of the model. Using this model, it was determined that the conventional via geometry reaches an engineering limit at $2 \mu \mathrm{m}$ of via diameter. Below this size, it becomes difficult to achieve reliable vias in polymers as they do not survive 1000 thermal cycles. Based on the modeling studies, a novel method is proposed for enhancement of reliability of vias below the engineering limit of $2\ \mu \mathrm{m}$.
求助全文
通过发布文献求助,成功后即可免费获取论文全文。 去求助
来源期刊
自引率
0.00%
发文量
0
期刊最新文献
Magnetically Actuated Test Method for Interfacial Fracture Reliability Assessment nSiP(System in Package) Platform for various module packaging applications IEEE 71st Electronic Components and Technology Conference [Title page] Evaluation of Low-k Integration Integrity Using Shear Testing on Sub-30 Micron Micro-Cu Pillars CoW Package Solution for Improving Thermal Characteristic of TSV-SiP for AI-Inference
×
引用
GB/T 7714-2015
复制
MLA
复制
APA
复制
导出至
BibTeX EndNote RefMan NoteFirst NoteExpress
×
×
提示
您的信息不完整,为了账户安全,请先补充。
现在去补充
×
提示
您因"违规操作"
具体请查看互助需知
我知道了
×
提示
现在去查看 取消
×
提示
确定
0
微信
客服QQ
Book学术公众号 扫码关注我们
反馈
×
意见反馈
请填写您的意见或建议
请填写您的手机或邮箱
已复制链接
已复制链接
快去分享给好友吧!
我知道了
×
扫码分享
扫码分享
Book学术官方微信
Book学术文献互助
Book学术文献互助群
群 号:481959085
Book学术
文献互助 智能选刊 最新文献 互助须知 联系我们:info@booksci.cn
Book学术提供免费学术资源搜索服务,方便国内外学者检索中英文文献。致力于提供最便捷和优质的服务体验。
Copyright © 2023 Book学术 All rights reserved.
ghs 京公网安备 11010802042870号 京ICP备2023020795号-1