等离子体激活低温模级直接键合与先进晶圆切割技术的三维异质集成

K. Sakuma, Dishit P. Parekh, M. Belyansky, Juan-Manuel Gomez, S. Skordas, D. Mcherron, I. de Sousa, Marc-Antoine K. Phaneuf, Martin M Desrochers, Ming Li, Y. Cheung, Siu Cheung So, S. Kwok, Chun Ho Fan, Siu Wing Lau
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引用次数: 3

摘要

在本文中,我们展示了一种等离子体激活的低温模级氧化物-氧化物直接结合先进的晶圆切割技术。该评估使用了300mm的硅片。采用等离子体增强化学气相沉积法(PECVD)将正硅酸四乙酯(TEOS)氧化物直接沉积在硅(Si)晶圆表面,然后进行化学机械平面化(CMP)。原子力显微镜(AFM)检测晶圆片切割前的表面粗糙度,RMS < 0.38 nm, RMS < 0.30 nm $\ mathm {R}_{\ mathm {a}}$。针对该集成方案,对金刚石刀片切割、阶梯切割刀片切割、斜角刀片切割和隐形激光切割等几种切割技术进行了评估。最后,金刚石刀片切割与许多材料的兼容性最好,但它导致了模具边缘的大切屑。隐形激光切割实现了小于$2\ \mu\mathrm{m}$的边缘切割,是本研究测试的所有切割方法中损伤最小的。在键合测试中,将10毫米见方的硅模与35毫米见方的硅衬底键合。硅模和衬底厚度均为$760\ \mu\ mathm {m}$。在直接氧化键合之前,硅模和衬底都要经过两步清洗过程。讨论了等离子体激活模级直接键合的详细过程。
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Plasma Activated Low-temperature Die-level Direct Bonding with Advanced Wafer Dicing Technologies for 3D Heterogeneous Integration
In this paper, we have demonstrated a plasma activated low-temperature die-level oxide-oxide direct bonding with advanced wafer dicing technologies. This evaluation used blanket 300-mm silicon wafers. $1\ \mu\mathrm{m}$ Tetraethyl orthosilicate (TEOS) oxide was deposited by plasma-enhanced chemical vapor deposition (PECVD) directly on the silicon (Si) wafer surface, followed by chemical mechanical planarization (CMP). Atomic Force Microscopy (AFM) was used to examine the roughness of the wafer surface before dicing and it showed < 0.38 nm RMS and < 0.30 nm $\mathrm{R}_{\mathrm{a}}$. Several dicing technologies such as diamond blade dicing, step-cut blade dicing, bevel blade dicing, and stealth laser dicing were evaluated for this integration scheme. In the end, diamond blade dicing has the most compatibility with many materials, but it led to large chipping on the edges of the die. Stealth laser dicing achieves edge chipping of less than $2\ \mu\mathrm{m}$, which is the least amount of damage among of all dicing methods tested in this study. In the bonding test, the 10 mm square silicon die was bonded to a 35-mm square silicon substrate. Both silicon die and substrate are of thickness $760\ \mu\mathrm{m}$. Prior to direct oxide-oxide bonding, both silicon die, and substrate went through a two-step cleaning process. The detailed process of the plasma activated die-level direct bonding is discussed.
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Magnetically Actuated Test Method for Interfacial Fracture Reliability Assessment nSiP(System in Package) Platform for various module packaging applications IEEE 71st Electronic Components and Technology Conference [Title page] Evaluation of Low-k Integration Integrity Using Shear Testing on Sub-30 Micron Micro-Cu Pillars CoW Package Solution for Improving Thermal Characteristic of TSV-SiP for AI-Inference
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