运行时可重构fpga的自适应FIR滤波器架构

2002 IEEE International Conference on Field-Programmable Technology, 2002. (FPT). Proceedings. Pub Date : 2002-12-16 DOI:10.1109/FPT.2002.1188664

T. Rissa, R. Uusikartano, J. Niittylahti

{"title":"运行时可重构fpga的自适应FIR滤波器架构","authors":"T. Rissa, R. Uusikartano, J. Niittylahti","doi":"10.1109/FPT.2002.1188664","DOIUrl":null,"url":null,"abstract":"This paper presents a technique for realizing adaptive FIR filters that use constant-coefficient multipliers on a run-time reconfigurable FPGA. Three different adaptive FIR filter architectures for run-time reconfigurable FPGAs are presented. It is shown that run-time reconfigurable logic can be used to efficiently implement adaptive constant-coefficient FIR filters. With reasonable configuration latency, benefits in speed, area and power consumption are obtained.","PeriodicalId":355740,"journal":{"name":"2002 IEEE International Conference on Field-Programmable Technology, 2002. (FPT). Proceedings.","volume":"3 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2002-12-16","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"18","resultStr":"{\"title\":\"Adaptive FIR filter architectures for run-time reconfigurable FPGAs\",\"authors\":\"T. Rissa, R. Uusikartano, J. Niittylahti\",\"doi\":\"10.1109/FPT.2002.1188664\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"This paper presents a technique for realizing adaptive FIR filters that use constant-coefficient multipliers on a run-time reconfigurable FPGA. Three different adaptive FIR filter architectures for run-time reconfigurable FPGAs are presented. It is shown that run-time reconfigurable logic can be used to efficiently implement adaptive constant-coefficient FIR filters. With reasonable configuration latency, benefits in speed, area and power consumption are obtained.\",\"PeriodicalId\":355740,\"journal\":{\"name\":\"2002 IEEE International Conference on Field-Programmable Technology, 2002. (FPT). Proceedings.\",\"volume\":\"3 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2002-12-16\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"18\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2002 IEEE International Conference on Field-Programmable Technology, 2002. (FPT). Proceedings.\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/FPT.2002.1188664\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2002 IEEE International Conference on Field-Programmable Technology, 2002. (FPT). Proceedings.","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/FPT.2002.1188664","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}

引用次数: 18

摘要

本文提出了一种利用常系数乘法器在运行时可重构FPGA上实现自适应FIR滤波器的技术。针对运行时可重构fpga，提出了三种不同的自适应FIR滤波器结构。结果表明，运行时可重构逻辑可以有效地实现自适应常系数FIR滤波器。通过合理的配置延迟，可以获得速度、面积和功耗方面的优势。

本文章由计算机程序翻译，如有差异，请以英文原文为准。

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Adaptive FIR filter architectures for run-time reconfigurable FPGAs

This paper presents a technique for realizing adaptive FIR filters that use constant-coefficient multipliers on a run-time reconfigurable FPGA. Three different adaptive FIR filter architectures for run-time reconfigurable FPGAs are presented. It is shown that run-time reconfigurable logic can be used to efficiently implement adaptive constant-coefficient FIR filters. With reasonable configuration latency, benefits in speed, area and power consumption are obtained.

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2002 IEEE International Conference on Field-Programmable Technology, 2002. (FPT). Proceedings.

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