可编程逻辑阵列应用的基于rtd的可重构逻辑门

Donghyeok Bae, Jaehong Park, Maengkyu Kim, Y. Jeong, Kyounghoon Yang
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引用次数: 1

摘要

只提供摘要形式。设计和制造了基于谐振隧道二极管(RTD)的可重构逻辑门,用于基于RTD的可编程逻辑阵列(PLA)。作为PLA的构建模块,提出了两个具有三个输入端的可重构逻辑门。所实现的门具有与、或、多数、非、异或、异或和3输入异或的可重构功能,利用了RTD单稳-双稳转换逻辑元件(MOBILE)的阈值特性。在时钟频率高达5 GHz的情况下,成功地证实了所制栅极的工作。对于全加法器拓扑,所提出的基于门的全加法器的器件数量少于传统CMOS全加法器拓扑的一半。
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RTD-based reconfigurable logic gates for programmable logic array applications
Summary form only given. Resonant-tunneling-diode (RTD) based reconfigurable logic gates have been designed and fabricated for RTD-based programmable logic array (PLA) applications. As PLA building blocks, two reconfigurable logic gates with three input terminals are proposed. The implemented gates show the reconfigurable functions of AND, OR, Majority, NOT, XOR, XNOR and 3-input XOR exploiting threshold characteristics of the RTD monostable-bistable transition logic element (MOBILE). The operation of the fabricated gates is successfully confirmed up to the clock frequency of 5 GHz. As for the full-adder topology, the number of devices in the proposed gate-based full-adder is less than a half of that in the conventional CMOS full-adder topology.
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