Y. Jeong, Hyungsoo Kim, Jingook Kim, Jongbae Park, Joungho Kim
{"title":"低抖动混合模式系统多层封装和PCB分电源/地平面的隔声方法分析","authors":"Y. Jeong, Hyungsoo Kim, Jingook Kim, Jongbae Park, Joungho Kim","doi":"10.1109/EPEP.2003.1250031","DOIUrl":null,"url":null,"abstract":"Various noise isolation methods for low jitter on the power/ground plane are thoroughly analyzed and a new method is proposed. We analyzed using both frequency and time domain measurement methods and the results were verified by jitter measurements.","PeriodicalId":254477,"journal":{"name":"Electrical Performance of Electrical Packaging (IEEE Cat. No. 03TH8710)","volume":"119 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2003-12-08","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"5","resultStr":"{\"title\":\"Analysis of noise isolation methods on split power/ground plane of multi-layered package and PCB for low jitter mixed mode system\",\"authors\":\"Y. Jeong, Hyungsoo Kim, Jingook Kim, Jongbae Park, Joungho Kim\",\"doi\":\"10.1109/EPEP.2003.1250031\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"Various noise isolation methods for low jitter on the power/ground plane are thoroughly analyzed and a new method is proposed. We analyzed using both frequency and time domain measurement methods and the results were verified by jitter measurements.\",\"PeriodicalId\":254477,\"journal\":{\"name\":\"Electrical Performance of Electrical Packaging (IEEE Cat. No. 03TH8710)\",\"volume\":\"119 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2003-12-08\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"5\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"Electrical Performance of Electrical Packaging (IEEE Cat. No. 03TH8710)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/EPEP.2003.1250031\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"Electrical Performance of Electrical Packaging (IEEE Cat. No. 03TH8710)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/EPEP.2003.1250031","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
Analysis of noise isolation methods on split power/ground plane of multi-layered package and PCB for low jitter mixed mode system
Various noise isolation methods for low jitter on the power/ground plane are thoroughly analyzed and a new method is proposed. We analyzed using both frequency and time domain measurement methods and the results were verified by jitter measurements.