J. A. Sainz, R. Muñoz, J. Maiz, L. A. Aguado, M. Roca
{"title":"用于测量数字CMOS VLSI电路中干扰的串扰传感器实现","authors":"J. A. Sainz, R. Muñoz, J. Maiz, L. A. Aguado, M. Roca","doi":"10.1109/OLT.2000.856611","DOIUrl":null,"url":null,"abstract":"This paper presents an approach for measuring crosstalk interference in digital CMOS VLSI circuits. The crosstalk sensor has been implemented in 0.8 /spl mu/m AMS (Austria Mikro Systeme) technology and its design is based on NOR and NAND RS latches. The interference is produced by an up (down) transition in an affecting line. The crosstalk sensor is designed to measure crosstalk interference amplitude produced by capacitive coupling between long metal lines. The sensor is programmable for measuring some ranges of crosstalk amplitude. The sensor design is based on the dynamic behavior of basic NOR and NAND gates depending on the MOS transistor sizes.","PeriodicalId":334770,"journal":{"name":"Proceedings 6th IEEE International On-Line Testing Workshop (Cat. No.PR00646)","volume":"86 12 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2000-07-03","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"4","resultStr":"{\"title\":\"A crosstalk sensor implementation for measuring interferences in digital CMOS VLSI circuits\",\"authors\":\"J. A. Sainz, R. Muñoz, J. Maiz, L. A. Aguado, M. Roca\",\"doi\":\"10.1109/OLT.2000.856611\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"This paper presents an approach for measuring crosstalk interference in digital CMOS VLSI circuits. The crosstalk sensor has been implemented in 0.8 /spl mu/m AMS (Austria Mikro Systeme) technology and its design is based on NOR and NAND RS latches. The interference is produced by an up (down) transition in an affecting line. The crosstalk sensor is designed to measure crosstalk interference amplitude produced by capacitive coupling between long metal lines. The sensor is programmable for measuring some ranges of crosstalk amplitude. The sensor design is based on the dynamic behavior of basic NOR and NAND gates depending on the MOS transistor sizes.\",\"PeriodicalId\":334770,\"journal\":{\"name\":\"Proceedings 6th IEEE International On-Line Testing Workshop (Cat. No.PR00646)\",\"volume\":\"86 12 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2000-07-03\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"4\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"Proceedings 6th IEEE International On-Line Testing Workshop (Cat. No.PR00646)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/OLT.2000.856611\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"Proceedings 6th IEEE International On-Line Testing Workshop (Cat. No.PR00646)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/OLT.2000.856611","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
A crosstalk sensor implementation for measuring interferences in digital CMOS VLSI circuits
This paper presents an approach for measuring crosstalk interference in digital CMOS VLSI circuits. The crosstalk sensor has been implemented in 0.8 /spl mu/m AMS (Austria Mikro Systeme) technology and its design is based on NOR and NAND RS latches. The interference is produced by an up (down) transition in an affecting line. The crosstalk sensor is designed to measure crosstalk interference amplitude produced by capacitive coupling between long metal lines. The sensor is programmable for measuring some ranges of crosstalk amplitude. The sensor design is based on the dynamic behavior of basic NOR and NAND gates depending on the MOS transistor sizes.