{"title":"从设计技术的角度看三维集成电路技术的产业前景","authors":"Kyu-Myung Choi","doi":"10.1109/ASPDAC.2010.5419823","DOIUrl":null,"url":null,"abstract":"3D IC integration is very important to overcome the technology scaling barriers and to satisfy mobile devices' demand. In this paper, we describe the challenges we are facing in developing 3D IC design methodology, especially in the case of TSV-SiP (Logic-Memory die stacking). Also, appropriate development approaches are proposed. The EDA tools for TSV-SiP, which are initially provided by extending current conventional tools, will be gradually enhanced to better support 3D IC designs.","PeriodicalId":152569,"journal":{"name":"2010 15th Asia and South Pacific Design Automation Conference (ASP-DAC)","volume":"50 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2010-01-18","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"7","resultStr":"{\"title\":\"An industrial perspective of 3D IC integration technology from the viewpoint of design technology\",\"authors\":\"Kyu-Myung Choi\",\"doi\":\"10.1109/ASPDAC.2010.5419823\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"3D IC integration is very important to overcome the technology scaling barriers and to satisfy mobile devices' demand. In this paper, we describe the challenges we are facing in developing 3D IC design methodology, especially in the case of TSV-SiP (Logic-Memory die stacking). Also, appropriate development approaches are proposed. The EDA tools for TSV-SiP, which are initially provided by extending current conventional tools, will be gradually enhanced to better support 3D IC designs.\",\"PeriodicalId\":152569,\"journal\":{\"name\":\"2010 15th Asia and South Pacific Design Automation Conference (ASP-DAC)\",\"volume\":\"50 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2010-01-18\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"7\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2010 15th Asia and South Pacific Design Automation Conference (ASP-DAC)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/ASPDAC.2010.5419823\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2010 15th Asia and South Pacific Design Automation Conference (ASP-DAC)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ASPDAC.2010.5419823","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
An industrial perspective of 3D IC integration technology from the viewpoint of design technology
3D IC integration is very important to overcome the technology scaling barriers and to satisfy mobile devices' demand. In this paper, we describe the challenges we are facing in developing 3D IC design methodology, especially in the case of TSV-SiP (Logic-Memory die stacking). Also, appropriate development approaches are proposed. The EDA tools for TSV-SiP, which are initially provided by extending current conventional tools, will be gradually enhanced to better support 3D IC designs.
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