硅基集成III-V纳米电子器件

2017 Silicon Nanoelectronics Workshop (SNW) Pub Date : 2017-06-01 DOI:10.23919/SNW.2017.8242267

H. Riel

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引用次数: 2

摘要

我将概述我们最近在电子器件硅(Si)上集成III-V半导体纳米结构的工作。本文介绍了模板辅助选择性外延技术(TASE)在硅上单片集成高晶体质量的III-V纳米结构。讨论了纳米III-V级mosfet和隧道fet的发展面临的挑战和最新进展，并展示了互补的p型InAs-Si和η型InAs-GaSb TFET技术。

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Integrated III-V nanoelectronic devices on Si

I will give an overview of our recent work on the integration of III-V semiconductor nano-structures on silicon (Si) for electronic devices. The template-assisted selective epitaxy (TASE) used to monolithically integrate high crystal quality III-V nanostructures on Si is introduced. The challenges and recent progress of the development of nanoscale III-V MOSFETs and Tunnel FETs is discussed and a complementary p-type InAs-Si and η-type InAs-GaSb TFET technology is demonstrated.

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2017 Silicon Nanoelectronics Workshop (SNW)

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